Method of making a contact structure

A method of fabricating a contact structure for an integrated circuit, comprising:

• providing a semiconductor substrate having a capacitor storage node thereon and having an active region therein that is adjacent to a transistor on the semiconductor substrate, and further having a lower bulk insulator layer upon the active region, the transistor, and the semiconductor substrate, a capacitor dielectric layer upon the lower bulk insulator layer and upon the capacitor storage node, a cell plate conductor layer upon the capacitor dielectric layer, and a cell plate insulator layer upon the cell plate conductor layer;
• forming an upper bulk insulator layer upon the cell plate insulator layer, the upper bulk insulator layer having a top surface and a thickness that is greater than that of the cell plate insulator layer;
• etching a opening defined by the lower bulk insulator layer, the capacitor dielectric layer, the cell plate conductor layer, the cell plate insulator layer, and the upper bulk insulator layer, the opening terminating at a bottom surface within the lower bulk insulator layer above the semiconductor substrate;
• depositing a sleeve insulator layer upon the top surface of the upper bulk insulator layer and within the opening so as to make contact with each of the lower bulk insulator layer, the capacitor dielectric layer, the cell plate conductor layer, and the cell plate insulator layer;
• etching the sleeve insulator layer from the bottom surface within the lower bulk insulator layer above the semiconductor substrate, from the top surface of the upper bulk insulator layer, such that the sleeve insulator layer has a terminus at an interface between the upper bulk insulator layer and the cell plate insulator layer, and extends to an opposite terminus that is above the semiconductor substrate, within the lower bulk insulator layer, and below the capacitor dielectric layer;
• etching the lower bulk insulator layer selective to the sleeve insulator layer to expose the active region on the semiconductor substrate;
• depositing a conductive plug in contact with each of the sleeve insulator layer, the active region on the semiconductor substrate, and a sidewall of the lower bulk insulator layer that is situated in between a contact on the semiconductor substrate and the sleeve insulator layer, wherein the conductive plug has an end comprising a refractory metal silicide, the end of the conductive plug being situated upon the contact on the semiconductor substrate.

A method of fabricating a contact structure for an integrated circuit, comprising:

• providing a semiconductor substrate having a capacitor storage node thereon, a contact plug on the semiconductor substrate, a lower bulk insulator layer upon the semiconductor substrate, a capacitor dielectric layer upon the lower bulk insulator layer and upon the capacitor storage node, a cell plate conductor layer upon the capacitor dielectric layer, and a cell plate insulator layer having a top surface upon the cell plate conductor layer;
• forming an opening defined by the lower bulk insulator layer, the capacitor dielectric layer, the cell plate conductor layer, and the cell plate insulator layer, the opening terminating at a bottom surface within the lower bulk insulator layer above the semiconductor substrate;
• forming a sleeve insulator layer upon the top surface of the cell plate insulator layer and within the opening so as to make contact with each of the lower bulk insulator layer, the capacitor dielectric layer, and the cell plate conductor layer;
• etching the sleeve insulator layer from the bottom surface within the lower bulk insulator layer above the semiconductor substrate, and from the top surface of the cell plate insulator layer, such that the sleeve insulator layer has a terminus adjacent to the top surface of the cell plate insulator layer, and extends to an opposite terminus that is above the semiconductor substrate, within the lower bulk insulator layer, and below the capacitor dielectric layer;
• forming an upper bulk insulator layer upon the cell plate insulator layer and within the opening adjacent to the sleeve insulator layer;
• etching the upper bulk insulator layer and the lower bulk insulator layer to expose the contact plug on the semiconductor substrate;
• and
• depositing an electrically conductive bit line extending from the sleeve insulator layer to terminate at the contact plug, the contact plug extending from the electrically conductive bit line to a contact on the semiconductor substrate, wherein the electrically conductive bit line is in contact with the sleeve insulator layer and a sidewall of the lower bulk insulator layer that is situated in between the contact plug and the sleeve insulator layer.

A method of fabricating a contact structure for an integrated circuit, comprising:

• providing a semiconductor substrate having thereon a capacitor storage node, a transistor on the semiconductor substrate, the transistor having a gate electrode, a lower bulk insulator layer upon the semiconductor substrate and upon the transistor, a capacitor dielectric layer upon the lower bulk insulator layer and upon the capacitor storage node, a cell plate conductor layer upon the capacitor dielectric layer, and a cell plate insulator layer upon the cell plate conductor layer;
• forming a opening defined by the lower bulk insulator layer, the capacitor dielectric layer, the cell plate conductor layer, and the cell plate insulator layer, the opening terminating at a bottom surface within the lower bulk insulator layer above the semiconductor substrate;
• forming a sleeve insulator layer upon a top surface of the cell plate insulator layer and within the opening so as to make contact with each of the lower bulk insulator layer, the capacitor dielectric layer, and the cell plate conductor;
• etching the sleeve insulator layer from the bottom surface within the lower bulk insulator layer above the semiconductor substrate, from the top surface of the upper bulk insulator layer, such that the sleeve insulator layer has a terminus at an interface between the upper bulk insulator layer and the cell plate insulator layer, and extends to an opposite terminus that is above the semiconductor substrate, within the lower bulk insulator layer, and below the capacitor dielectric layer;
• forming an upper bulk insulator layer upon the cell plate insulator layer and within the opening adjacent to the sleeve insulator layer;
• etching the lower bulk insulator layer and the transistor to expose the gate electrode,
• depositing an electrically conductive bit line extending from the sleeve insulator layer to terminate at the gate electrode, wherein the electrically conductive bit line is in contact with the sleeve insulator layer and a sidewall of the lower bulk insulator layer that is situated in between the gate electrode and the sleeve insulator layer.

A method of fabricating a contact structure for an integrated circuit, comprising:

• providing a semiconductor substrate having a lower bulk insulator layer and a capacitor storage node upon thereupon, and further having a capacitor dielectric layer upon the lower bulk insulator layer on the capacitor storage node, a cell plate conductor layer upon the capacitor dielectric layer, and a cell plate insulator layer upon the cell plate conductor layer:
• forming a sleeve insulator layer upon a top surface of the cell plate insulator layer and within the opening so as to make contact with each of the lower bulk insulator layer,
• the capacitor dielectric layer, and the cell plate conductor layer;
• selectively removing the sleeve insulator layer to have a terminus contiguous with the top surface of the cell plate insulator layer, and an extension to an opposite terminus that is above the semiconductor substrate, within the lower bulk insulator layer, and below the capacitor dielectric layer;
• forming an upper bulk insulator layer upon the cell plate insulator layer and within the opening adjacent to the sleeve insulator layer;
• and
• removing material of the upper bulk insulator layer and the lower bulk insulator layer to expose a contact on the semiconductor substrate.

A method of fabricating a contact structure for an integrated circuit, comprising:

• providing a semiconductor substrate having a lower bulk insulator layer and a capacitor storage node thereupon, and further having, a capacitor dielectric layer upon the capacitor storage node, a cell plate conductor layer upon the capacitor storage node and above the lower bulk insulator layer, and a cell plate insulator layer upon the cell plate conductor layer;
• forming an upper bulk insulator layer upon the cell plate insulator layer, the upper bulk insulator layer having a top surface and a thickness that is greater than that of the cell plate insulator layer;
• forming an opening that is defined by each of the lower bulk insulator layer, the capacitor dielectric layer, the cell plate conductor layer, the cell plate insulator layer, and the upper bulk insulator layer, the opening extending towards the semiconductor substrate and terminating at a bottom surface within the lower bulk insulator layer above the semiconductor substrate;
• forming a sleeve insulator layer upon the upper bulk insulator layer and within said opening so that the sleeve insulator layer makes contact with each of the lower bulk insulator layer, the cell plate conductor layer, and the cell plate insulator layer;
• selectively removing the sleeve insulator layer so as to have a terminus at an interface between the upper bulk insulator layer and the cell plate insulator layer and an extension to an opposite terminus that is within the lower bulk insulator layer and above the semiconductor substrate;
• and
• removing the lower bulk insulator layer from the bottom surface within the lower bulk insulator layer above the semiconductor substrate to expose a contact on the semiconductor substrate.

A method of fabricating a contact structure for an integrated circuit, comprising:

• providing a semiconductor substrate having a lower bulk insulator layer and a capacitor storage node thereupon, and further having, a capacitor dielectric layer upon the capacitor storage node and upon the lower bulk insulator layer, a cell plate conductor layer upon the capacitor dielectric layer, and a cell plate insulator layer upon the cell plate conductor layer;
• forming an upper bulk insulator layer upon the cell plate insulator layer, wherein the thickness of the upper bulk insulator layer is greater than that of the cell plate insulator layer;
• selectively removing each of the upper bulk insulator layer, the cell plate insulator layer, the cell plate conductor layer, the capacitor dielectric layer, and the lower bulk insulator layer so as to form a opening terminating at a bottom surface within the lower bulk insulator layer above the semiconductor substrate;
• depositing a sleeve insulator layer over the upper bulk insulator layer and within the opening so as to make contact with each of the lower bulk insulator layer, the capacitor dielectric layer, the cell plate conductor layer, and the cell plate insulator layer;
• selectively removing the sleeve insulator layer such that a remaining portion thereof extends from a terminus at an interface between the upper bulk insulator layer and the cell plate insulator layer to an opposite terminus within the lower bulk insulator layer and above the semiconductor substrate;
• selectively removing the lower bulk insulator layer to create a contact hole defined by the sleeve insulator layer and the lower bulk insulator layer and to expose a contact on the semiconductor substrate;
• and
• forming a conductive plug in the contact hole upon the contact on the semiconductor substrate, the sleeve insulator layer electrically insulating the conductive plug from the cell plate conductor layer.

A method of fabricating a contact structure for an integrated circuit, comprising:

• providing a semiconductor substrate having a lower bulk insulator layer and a capacitor storage node thereupon, and further having a capacitor dielectric layer upon the capacitor storage node and upon the lower bulk insulator layer, a cell plate conductor layer upon the capacitor dielectric layer, and a cell plate insulator layer upon the cell plate conductor layer;
• forming an upper bulk insulator layer upon the cell plate insulator layer;
• selectively removing each of the upper bulk insulator layer, the cell plate insulator layer, the lower bulk insulator layer, the capacitor dielectric layer, and the cell plate conductor layer to define an opening terminating at a bottom surface within the lower bulk insulator layer above the semiconductor substrate;
• depositing a sleeve insulator layer over the upper bulk insulator layer and within the opening so as to make contact with each of the lower bulk insulator layer, the capacitor dielectric layer, the cell plate conductor layer, and the cell plate insulator layer;
• selectively removing the sleeve insulator layer such that a remaining portion thereof extends from a terminus at an interface between the upper bulk insulator layer and the cell plate insulator layer to an opposite terminus that is within the lower bulk insulator layer and above the semiconductor substrate;
• selectively removing material from the lower bulk insulator layer to create a contact hole extending from the upper bulk insulator layer through the sleeve insulator layer and the lower bulk insulator layer to expose a contact on the semiconductor substrate;
• and
• forming a conductive plug in the contact hole upon the contact on the semiconductor substrate and extending to the upper bulk insulator layer, the sleeve insulator layer electrically insulating the conductive plug from the cell plate conductor layer.

A method of fabricating a contact structure for an integrated circuit, comprising:

• providing a semiconductor substrate having an active region therein, a capacitor storage node upon the active region, a capacitor dielectric layer upon the capacitor storage node, and a cell plate conductor layer upon the capacitor dielectric layer;
• forming a cell plate insulator layer upon the cell plate conductor layer;
• forming a upper bulk insulator layer upon the cell plate insulator layer, wherein the upper bulk insulator layer is greater in thickness than the cell plate insulator layer;
• forming a contact hole extending through the upper bulk insulator layer, the cell plate insulator layer, the cell plate conductor layer, the capacitor dielectric layer, and the capacitor storage node to terminate at the active region;
• forming a sleeve insulator layer within the contact hole, the sleeve insulator layer extending from a terminus at an interface between the upper bulk insulator layer and the cell plate insulator layer and an opposite terminus that is below the capacitor dielectric layer and above the semiconductor substrate;
• and
• forming an electrically conductive plug extending through the sleeve insulator layer to make contact with the active region and the capacitor storage node, the electrically conductive plug being electrically insulated from the cell plate conductor layer by the sleeve insulator layer.