Method for concurrently producing at least a pair of semiconductor structures that each include at least one useful layer on a substrate
AssigneesS.O.I.Tec Silicon on Insulator Technologies, Commissariat à l'Energie Atomique (CEA)
InventorsBruno Ghyselen, Cécile Aulnette, Benoit Bataillou, Carlos Mazure, Hubert Moriceau
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