Methods and apparatus having wafer level chip scale package for sensing elements
AssigneeFreescale Semiconductor, Inc.
InventorsWilliam G. McDonald, Stephen R. Hooper, Arvind S. Salian
Life of this patent
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Abstract
Methods are provided for manufacturing a sensor. The method comprises depositing a sacrificial material at a first predetermined thickness onto a wafer having at least one sense element mounted thereon, the sacrificial material deposited at least partially onto the at least one sense element, forming an encapsulating layer at a second predetermined thickness less than the first predetermined thickness over the wafer and around the deposited sacrificial material, and removing the sacrificial material. Apparatus for a sensor manufactured by the aforementioned method are also provided.
Claims20
A method for manufacturing a sensor comprising:
- depositing a sacrificial material at a first predetermined thickness onto a wafer having at least one sence element mounted thereon, the sacrificial material deposited at least partially onto the at least one sense element;
- forming an encapsulating layer at a second predetermined thickness less than the first predetermined thickness over the wafer and around the deposited sacrificial material;
- and
- removing the sacrificial material.
A method for manufacturing a sensor comprising:
- depositing a sacrificial material at a first predetermined thickness onto a wafer having at least one sense element mounted thereon, the sacrificial material having thixotropic properties and having a capability to withstand a temperature of at least about 140° C. and being deposited at least partially onto the at least one sense element;
- forming an encapsulating layer at a second predetermined thickness less than the first predetermined thickness over the wafer and around the deposited sacrificial material;
- and
- removing the sacrificial material.
A sensor comprising:
- a wafer having a first and a second side, each of the wafer and second sides having a surface;
- an interconnect extending between the wafer first and second sides and including a first end and a second end, the interconnect first end exposed at the surface of the wafer first side and the interconnect second end exposed at and extending alone a portion of the surface of the wafer second side;
- a sense element coupled to and disposed over the wafer second side the sense element including a first portion and a second portion, the first portion in contact with the interconnect second end;
- circuitry formed in the wafer second side contacting the interconnect and the sense element;
- and
- an encapsulant layer coupled to the wafer second side, the encapsulant layer having an opening formed therethrough exposing the sense element second portion.
Dependencies are inferred from the claim text.