US 7,105,436 B2 · Method for in-line monitoring of via/contact holes etch process based on test structures in semiconductor wafer manufacturing

Abstract

A method for in-line monitoring of via/contact etching process based on a test structure is described. The test structure is comprised of via/contact holes of different sizes and densities in a layout such that, for a certain process, the microloading or RIE lag induced non-uniform etch rate produce under-etch in some regions and over-etch in others. A scanning electron microscope is used to distinguish these etching differences in voltage contrast images. Image processing and simple calibration convert these voltage contrast images into a “fingerprint” image characterizing the etching process in terms of thickness over-etched or under-etched. Tolerance of shifting or deformation of this image can be set for validating the process uniformity. This image can also be used as a measure to monitor long-term process parameter shifting, as well as wafer-to-wafer or lot-to-lot variations. Advanced process control (APC) can be performed in-line with the guidance of this image so that potential electrical defects are avoided and process yield ramp accelerated.

Claims12

Dependent claims

A method for characterizing an etching process, the method comprising:

performing an etching process to a first layer to form an array of via regions and to a second layer to form at least a first via outside the array of via regions, the first layer associated with a first thickness, the second layer associated with a second thickness;
obtaining an image of the array of via regions;
determining a plurality of via regions in the array of via regions, each of the plurality of via regions includes a second via and a third via corresponding to a dark area and a bright area on the image respectively;
processing information associated with the plurality of via regions and the first via;
determining a first depth associated with the first via relative to the second thickness based on at least information associated with the plurality of via regions and the first via;
wherein:
the processing information associated with the plurality of via regions and the first via includes determining a threshold depth with respect to the first thickness;
the threshold depth is related to a transition from a dark region to a bright region on the image.

5 more elements

A method for characterizing an etching process, the method comprising:

performing an etching process to a first layer to form an array of via regions and to a second layer to form at least a first via outside the array of via regions, the first layer associated with a first thickness, the second layer associated with a second thickness;
obtaining an image of the array of via regions;
determining a plurality of via regions in the array of via regions, each of the plurality of via regions includes a second via and a third via corresponding to a dark area and a bright area on the image respectively;
processing information associated with the plurality of via regions and the first via;
determining a first depth associated with the first via relative to the second thickness based on at least information associated with the plurality of via regions and the first via;
wherein the obtaining an image of the array of via regions comprises obtaining the image with a secondary electron microscope associated with a primary electron beam;
wherein the processing information associated with the plurality of via regions and the first via comprises:
processing information associated with the primary electron beam;
determining a threshold depth with respect to the first thickness based on at least information associated with the primary electron beam;
wherein the threshold depth is related to a transition from a dark region to a bright region on the image.

7 more elements

Dependencies are inferred from the claim text.

Method for in-line monitoring of via/contact holes etch process based on test structures in semiconductor wafer manufacturing

Life of this patent

Method for in-line monitoring of via/contact holes etch process based on test structures in semiconductor wafer manufacturing

Life of this patent

Abstract

Claims12