Semiconductor device and method of forming the same

#The present invention relates generally to semiconductors, and more particularly to a semiconductor device and method of forming the same.

#For integrated circuits, it is often important to limit the current which is injected by a semiconductor device into its semiconductor substrate. This is particularly important for power integrated circuits which operate at higher voltages and currents. Also, it is desirable to increase the maximum voltage that may be used with a power integrated circuit.

#The present invention is illustrated by way of example and not limited by the accompanying figures, in which like references indicate similar elements, and in which:

#FIG. 1 illustrates, in cross-sectional view, a semiconductor device in accordance with one embodiment of the present invention; and

#FIG. 2 illustrates, in graphical form, a current versus voltage (cathode to anode voltage) graph illustrating cathode current and substrate current produced by the semiconductor device of FIG. 1.

#Skilled artisans appreciate that elements in the figures are illustrated for simplicity and clarity and have not necessarily been drawn to scale. For example, the dimensions of some of the elements in the figures may be exaggerated relative to other elements to help improve the understanding of the embodiments of the present invention.

#The rapid evolution of SMARTMOS technologies to integrate power devices along with analog and CMOS (complementary metal oxide semiconductor) on the same chip has created the opportunity for systems-on-a-chip solutions. Power management in automotive, portable, and computer peripheral applications drive the need for a versatile smart power technology capable of operating from lower battery voltages all the way up to high voltages in the tens of volts. However, some conventional semiconductor devices, such as diodes, may suffer from the problem of parasitic substrate injection in certain situations. Integration of a high voltage isolated diode device into a smart power technology for the purpose of suppressing substrate injection requires a new structure and method of forming.

#FIG. 1 illustrates, in cross-sectional view, a semiconductor device in accordance with one embodiment of the present invention. As used in FIG. 1, “P−, P, P+, and P++” will represent semiconductor material having P-type conductivity, wherein the dopant concentrations vary from lowest dopant concentrations for P−, higher dopant concentration for P, even higher dopant concentration for P+, and the highest dopant concentration for P++. Similarly, “N, N+, and N++” will represent semiconductor material having N-type conductivity, wherein the dopant concentrations vary from lowest dopant concentrations for N, higher dopant concentration for N+, and the highest dopant concentration for N++.