Injection enhanced gate transistor including second emitter in dummy region to prevent waveform vibration associated with negative gate capacitance

A semiconductor device comprising:

• a drift layer of a first conductivity type;
• a collector layer of a second conductivity type located on the drift layer;
• a collector electrode located on the collector layer;
• a base layer of the second conductivity type located in a region isolated from the collector layer on the drift layer;
• a plurality of trenches formed at certain intervals to extend from the top surface of the base layer into the drift layer and thereby divide the base layer to main cell regions and dummy cell regions;
• a first emitter layer of the first conductivity type selectively formed in the surface layer of the base layer in each main cell region to extend along adjacent one of the trenches;
• gate electrodes formed in the trenches sandwiching each main cell region among said plurality of trenches via a gate insulating film;
• an emitter electrode located over the base layer and the first emitter layer in each main cell region;
• and
• a second emitter layer of the first conductivity type selectively formed so as to be scattered in the surface layer of the base layer in each dummy region and having a surface area smaller than that of the first emitter layer.