Semiconductor device with reduced memory leakage current
AssigneeRenesas Technology Corp.
InventorsKeisuke Tsukamoto, Yoshihiro Ikeda, Tsutomu Okazaki, Daisuke Okada, Hiroshi Yanagita
Life of this patent
Estimating the term…
Abstract
Defects in element forming regions on which memory cells of a non-volatile memory are formed are to be diminished to reduce leakage current. End portions of element forming regions with non-volatile memory cells formed thereon are extended a length D by utilizing the region which underlies a dummy conductive film, whereby a stress induced from an insulating film which surrounds the element forming regions is concentrated on the extended region. As a result, defects do not extend up to the regions where memory cells are formed and therefore it is possible to reduce leakage current in the memory cells.
Claims64
A semiconductor integrated circuit device, comprising:
- (a) two or more element forming regions formed over a surface portion of a semiconductor substrate and defined by an insulating film, said two or more element forming regions each extending in a first direction and being arranged in a second direction perpendicular to said first direction;
- (b) a plurality of memory cells formed on over main surfaces of said two or more element forming regions;
- and
- (c) a conductive film formed over said semiconductor substrate, said conductive film having a first portion which extends in said first direction along a first side of said surface portion of said semiconductor substrate and a second portion which extends in said second direction along a second side of said surface portion,
- wherein said two or more element forming regions have end portions positioned below said second portion of said conductive film.
A semiconductor integrated circuit device, comprising:
- (a) an element forming region formed over a surface portion of a semiconductor substrate and defined by an insulating film, said element forming region having two or more element forming portions each extending in a first direction and arranged in a second direction perpendicular to said first direction, and a connecting portion extending in said second direction to connect end portions of said two or more element forming portions;
- (b) a plurality of memory cells formed on a main surface of said element forming region;
- and
- (c) a conductive film formed over said semiconductor substrate, said conductive film having a first portion which extends in said first direction along a first side of said surface portion of said semiconductor substrate and a second portion which extends in said second direction along a second side of said surface portion,
- wherein said two or more element forming portions have end portions positioned below said second portion of said conductive film.
A semiconductor integrated circuit device according to claim 19,
- wherein said insulating film is buried into a trenched portion formed in said semiconductor substrate.
A semiconductor integrated circuit device, comprising:
- (a) three or more element forming regions formed over a surface portion of a semiconductor substrate and defined by an insulating film, said three or more element forming regions each extending in a first direction and being arranged in a second direction perpendicular to said first direction;
- and
- (b) a plurality of memory cells formed over main surfaces of said three or more element forming regions, and
- (c) a conductive film formed over said semiconductor substrate, said conductive film having a first portion which extends in said first direction along a first side of said surface portion of said semiconductor substrate and a second portion which extends in said second direction along a second side of said surface portion,
- wherein said three or more element forming regions have end portions positioned below said second portion of said conductive film which, and
- wherein an outermost one of said three or more element forming regions has a greater width in said second direction than each of the others of said three or more elements forming regions.
A semiconductor integrated circuit device, comprising:
- (a) three or more element forming regions formed over a surface of a semiconductor substrate and defined by an insulating film, said three or more element forming regions each extending in a first direction and being arranged in a direction perpendicular to said first direction;
- and
- (b) a plurality of memory cells formed of said three or more element forming regions, said memory cells each including:
- (b1) a first electrode including a first conductive film formed over a first insulating film;
- (b2) a second electrode including a second conductive film formed over a second insulating film on said first electrode, said second electrode extending in said second direction;
- and
- (b3) semiconductor regions formed on the corresponding element forming region on both sides of said second electrode,
- wherein memory cells formed on an outermost element forming region of said three or more element forming regions do not function as memory cells;
- and
- wherein said second electrodes of said plurality of memory cells comprise, in an alternately arranged state, one said second electrode extending beyond said outermost element forming region and another said second electrode not extending beyond said outermost element forming region.
A semiconductor integrated circuit device, comprising:
- (a) an element forming region formed over a surface portion of a semiconductor substrate and defined by an insulating film, said element forming region having three or more element forming portions extending in a first direction and arranged in a second direction perpendicular to said first direction, and a connecting portion extending in said second direction to connect end portions of said three or more element forming portions;
- and
- (b) a plurality of memory cells formed over said three or more element forming portions, said memory cells each having:
- (b1) a first electrode including a first conductive film formedover a first insulating film;
- (b2) a second electrode including a second conductive film formed over a second insulating film on said first electrode, said second electrode extending in said second direction;
- and
- (b3) semiconductor regions formed in said element forming region on both sides of said second electrode, wherein memory cells formed on an outermost element forming portion of said three or more element forming portions do not function as memory cells;
- and
- (c) a conductive film formed over said semiconductor substrate, said conductive film having a first portion which extends in said first direction along a first side of said surface portion of said semiconductor substrate and a second portion which extends in said second direction along a second side of said surface portion,
- wherein said three or more element forming portions have end portions positioned below said second portion of said conductive film.
A semiconductor integrated circuit device, comprising:
- (a) an element forming region formed over a surface portion of a semiconductor substrate and defined by an insulating film, said element forming region having two or more element forming portions each extending in a first direction and arranged in a second direction perpendicular to said first direction, and a connecting portion extending in said second direction to connect end portions of said two or more element forming portions;
- and
- (b) a plurality of memory cells formed on a main surface of said element forming region;
- wherein an outermost one of said two or more element forming portions has a greater width in said second direction than each of the others of said two or more element forming portions;
- and
- (c) a conductive film formed over said semiconductor substrate, said conductive film having a first portion which extends in said first direction along a first side of said surface portion of said semiconductor substrate and a second portion which extends in said second direction along a second side of said surface portion,
- wherein said two or more element forming portions have end portions positioned below said second portion of said conductive film.
A semiconductor integrated circuit device, comprising:
- (a) three or more element forming regions formed over a surface portion of a semiconductor substrate and defined by an insulating film, said three or more element forming regions each extending in a first direction and being arranged in a direction perpendicular to said first direction;
- and
- (b) a plurality of memory cells formed on said three or more element forming regions, said memory cells each including;
- (b1) a first electrode including a first conductive film formed over a first insulating film;
- (b2) a second electrode including a second conductive film formed over a second insulating film on said first electrode, said second electrode extending in said second direction;
- and
- (b3) semiconductor regions formed on the corresponding element forming region on both sides of said second electrode,
- wherein memory cells formed on an outermost element forming region of said three or more element forming regions do not function as memory cells;
- and
- (c) a conductive film formed over said semiconductor substrate, said conductive film having a first portion which extends in said first direction along a first side of said surface portion of said semiconductor substrate and a second portion which extends in said second direction along a second side of said-surface portion,
- wherein said three or more element forming regions have end portions positioned below said second portion of said conductive film.
A semiconductor integrated circuit device, comprising:
- (a) two or mqre element forming regions formed over surface portion of a semiconductor substrate and defined by an insulating film, said two or more element forming regions each extending in a first direction and being arranged in a second direction perpendicular to said first direction;
- (b) a plurality of memory cells formed over main surfaces of said two or more element forming regions;
- and
- (c) a conductive film formed over said semiconductor substrate, said conductive film having at least a portion extending in said second direction,
- wherein said insulating film is buried into a trenched portion formed in said semiconductor substrate, and
- wherein end portions of said two or more element forming regions are positioned below said portion of said conductive film.
A semiconductor integrated circuit device, comprising:
- (a) two or more element forming regions formed over a surface portion of a semiconductor substrate and defined by an insulating film, said two or more element forming regions each extending in a first direction and being arranged in a secon& direction perpendicular to said first direction;
- (b) a plurality of memory cells formed over main surfaces of said two or more element forming regions;
- and
- (c) a conductive film formed over said semiconductor substrate, said conductive film having a first portion which extends in said first direction along a first side of said surface portion of said semiconductor substrate and a second portion which extends in said second direction along a second side of said surface portion,
- wherein said plurality of memory cells each include:
- (b1) a first insulating film formed over a corresponding element forming region;
- (b2) a first conductive film formed over said first insulating film;
- (b3) a second insulating film formed over said first conductive film;
- and
- (b4) a second conductive film formed over said second insulating film, said second conductive film extending in said second direction;
- and
- wherein said insulating film defining said two or more element forming regions is buried into a trenched portion formed in said semiconductor substrate,
- wherein said second portion of conductive film is on the same layer as said second conductive film, and
- wherein end portions of said two or more element forming regions are positioned below said second portion of conductive film.
A semiconductor integrated circuit device, comprising:
- (a) two or more element forming regions formed over a surface portion of a semiconductor substrate and defined by an insulating film, said two or more element forming regions each extending in a first direction and being arranged in a second direction perpendicular to said first direction;
- (b) a plurality of meory cells formed over main surfaces of said two or more element forming regions;
- and
- (c) a conductive film formed over said semiconductor substrate, said conductive film having at least a first portion which extends in said first direction along a first side of said surface portion of said semiconductor substrate and at least a second portion which extends in said second direction along a second side of said surface portion,
- wherein said insulating film is buried into a trenched portion formed in said semiconductor substrate, and
- wherein end portions of said two or more element forming regions are positioned below said second portion of said conductive film.
A semiconductor integrated circuit device, comprising:
- (a) two or more element forming regions formed over a surface portion of a semiconductor substrate and defined by an insulating film, said two or more element forming regions each extending in a first direction and being arranged in a second direction perpendicular to said first direction;
- (b) a plurality of mmory cells formed on main surfaces of said two or more element forming regions;
- and
- (c) a conductive film formed over said semiconductor substrate, said conductive film having at least a first portion which extends in said first direction along a first side ot said surface portion of said semiconductor substrate and at least a second portion which extends in said second direction along a second side of said surface portion,
- wherein said plurality of memory cells each include:
- (b1) a first insulating film formed over a corresponding element forming region;
- (b2) a first conductive film formed over said first insulating film;
- (b3) a second insulating film formed over said first conductive film;
- and
- (b4) a second conductive film formed over said second insulating film, said second conductive film extending in said second direction;
- and
- wherein said insulating film defining said two or more element forming regions is buried into a trenched portion formed in said semiconductor substrate,
- wherein said first and second portions of conductive film are on the same layer as said second conductive film, and
- wherein end portions of said two or more element forming regions extend up to are positioned below said second portion of conductive film.
Dependencies are inferred from the claim text.