Methods for modeling latch transparency
AssigneeInternational Business Machines Corporation
InventorsErwin Behnen, Jeffrey P. Soreff, James D. Warnock, Dieter Wendel
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Abstract
In a first aspect, a method is provided that includes the steps of (1) receiving a circuit design having a plurality of latches; and (2) allowing one or more latches of the circuit design to be locally treated as exhibiting latch transparency during modeling of the timing behavior of the circuit design. Numerous other aspects are provided.
Claims15
A method for modeling a circuit having one or more latches comprising:
- providing a timing tool that models a circuit design having latches, wherein the timing tool models each latch of the circuit design as being non-transparent;
- receiving the circuit design in the timing tool, the circuit design having a plurality of latches;
- and
- allowing a selected subset of one or more latches of the circuit design to exhibit latch transparency while the selected subset is still being modeled as non-transparent by the timing tool during modeling of a timing behavior of the circuit design with the timing tool.
A computer program product for modeling a circuit having one or more latches comprising:
- a medium readable by a computer, the computer readable medium having computer program code adapted to:
- model a circuit design having latches, wherein each latch of the circuit design is modeled as being non-transparent;
- receive the circuit design having a plurality of latches;
- and
- allow a selected subset of one or more latches of the circuit design to exhibit latch transparency while the selected subset is still being modeled as non-transparent during modeling of a timing behavior of the circuit design.
A method for modeling a circuit having one or more latches comprising:
- providing a timing tool adapted to model circuit designs, wherein the timing tool models latches in the circuit designs as non-transparent;
- receiving a circuit design in the timing tool, the circuit design having a plurality of latches;
- selecting a subset of the plurality of latches of the circuit design;
- and
- altering a signal input to the subset of latches so that the subset of latches exhibit latch transparency during modeling of a timing behavior of the circuit design even though the timing tool continues to model the subset of latches as non-transparent.
Dependencies are inferred from the claim text.