System architecture and method for synchronization of real-time clocks in a document processing system

In a document processing system comprising a marking engine that marks a sheet to form at least a portion of a document, the marking engine further including a controller, the controller further including a master clock, a resource that transfers the sheet to the marking engine or receives the sheet from the marking engine, the resource further including a slave clock related to operational timing of the resource, and electrical interconnections connecting the resource to the controller, the electrical interconnections further including a control bus and a network, a method of initially synchronizing the slave clock with the master clock comprising the steps of:

• a) saving a value of the master clock in the controller;
• b) generating a discrete clock synchronization interrupt signal in the controller and distributing the discrete clock synchronization interrupt signal to the resource via the control bus;
• c) receiving the discrete clock synchronization interrupt signal at the resource and saving a first value of the slave clock;
• d) sending a message from the resource to the controller via the network to request the value saved for the master clock;
• e) sending the value saved for the master clock from the controller to the resource via the network;
• f) receiving the value saved for the master clock at the resource;
• g) saving a second value of the slave clock in the resource;
• h) subtracting the first value from the second value to determine a slave clock difference value;
• and
• i) adding the difference value to the value saved for the master clock to determine a synchronized value for the slave clock and setting the slave clock to the synchronized value.

In a document processing system comprising a marking engine that marks a sheet to form at least a portion of a document, the marking engine further including a controller, the controller further including a master clock, a resource that transfers the sheet to the marking engine or receives the sheet from the marking engine, the resource further including a slave clock related to operational timing of the resource, and electrical interconnections connecting the resource to the controller, the electrical interconnections further comprising a control bus and a network, a method of synchronizing the slave clock with the master clock during steady state operation of the document processing system comprising the steps of:

• a) saving a value of the master clock in the controller;
• b) generating a discrete clock synchronization interrupt signal in the controller and distributing the discrete clock synchronization interrupt signal to the resource via the control bus;
• c) receiving the discrete clock synchronization interrupt signal at the resource and saving a value of the slave clock;
• d) sending a message from the resource to the controller via the network to request the value saved for the master clock;
• e) sending the value saved for the master clock from the controller to the resource via the network;
• f) receiving the value saved for the master clock at the resource;
• and
• g) subtracting the value saved for the slave clock from the value saved for the master clock to determine an error value between the slave clock and the master clock and using the error value in an adjustment algorithm to adjust the slave clock to be synchronized with the master clock.

An electrophotographic document processing system, operated in a xerographic environment, comprising:

• a marking engine that marks a sheet to form at least a portion of a document, the marking engine including a controller, the controller including a master clock and logic for generating a discrete clock synchronization interrupt signal;
• a plurality of resources, each resource is associated with transfer of the sheet to the marking engine or receipt of the sheet from the marking engine, each resource including a slave clock related to operational timing of the resource and logic for receiving the discrete clock synchronization interrupt signal, processing the discrete clock synchronization interrupt signal, and synchronizing the slave clock with the master clock;
• and
• electrical wiring interconnecting the resources and the controller for distributing the discrete clock synchronization interrupt signal to the resources.