FSK demodulator using DLL and a demodulating method

A FSK demodulator comprising:

• a Delay Locked Loop (DLL) circuit having a delayer with a delay cell configured to delay an output of a reference clock;
• a phase detector configured to detect a phase difference between an output clock of the delayer and the reference clock;
• a delay controller configured to provide a delay time control signal;
• a delay line configured to delay an output of an input square wave according to the delay time control signal;
• one or more deciders, each of which corresponds to a delay cell, configured to determine a time order of a rising edge of the input square wave and a rising edge of the output clock and to output data generated in accordance with the time order;
• and
• an output device that, on the basis of data output from the decider, corresponds data to a maximum or minimum frequency of the input square wave and selects a demodulation decider, corresponding to the mean of the maximum and minimum frequency, configured to demodulate the input square wave and output demodulation data.

A method for demodulating a signal comprising:

• receiving an FSK modulation frequency;
• converting the FSK modulation frequency into a square wave;
• delaying the square wave by a delay time to yield a delayed square wave, including locking the delay time based on a period of an input reference clock;
• outputting data based on a time order of a rising edge of the square wave and the delayed square wave;
• and
• demodulating the square wave into data.