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US 7,079,589 B1Granted
Serial digital communication superimposed on a digital signal over a single wire
AssigneeNational Semiconductor Corporation
InventorsDragan Maksimovic, James Thomas Doyle
Life of this patent
Estimating the term…
Abstract
A communications system interleaves control pulses between the transitions in a serial bit stream to form an interleaved signal. The serial bit stream has a series of transitions and a series of gaps between transitions where a transition can not occur. An interleaver identifies gaps in the serial bit stream, and inserts the control pulses in the gaps to form the interleaved signal. The interleaved signal reduces the pin count when the interleaved signal is transmitted between chips.
Claims30
A communications system comprising:
- a first signal generator that generates a serial bit stream in response to an input signal and a clock signal, the serial bit stream having a plurality of transitions and a plurality of gaps between transitions where transitions can not occur, the first signal generator being a pulse width modulator that modulates a duty cycle of the clock signal in response to the input signal to output the serial bit stream;
- a second signal generator that generates a control pulse in response to a control signal;
- and
- an interleaver connected to the first and second signal generators, the interleaver:
- determining a position of a gap within the serial bit stream;
- and
- inserting the control pulse into the gap to output an interleaved signal.
4 more elements
A communications system comprising:
- a first signal generator that generates a serial bit stream in response to an input signal and a clock signal, the serial bit stream having a plurality of transitions and a plurality of gaps between transitions where transitions can not occur, the first signal generator being a pulse polarity modulator that modulates a polarity of the clock signal in response to the input signal and a feedback signal to output the serial bit stream;
- a second signal generator that generates a control pulse in response to a control signal;
- and
- an interleaver connected to the first and second signal generators, the interleaver:
- determining a position of a gap within the serial bit stream;
- and
- inserting the control pulse into the gap to output an interleaved signal.
4 more elements
A communications system comprising:
- a first signal generator that generates a serial bit stream in response to an input signal and a clock signal, the serial bit stream having a plurality of transitions and a plurality of gaps between transitions where transitions can not occur, the first signal generator being a pulse position modulator that:
- generates a symbol clock signal;
- and
- outputs a pulse during each symbol period in response to the input signal to output the serial bit stream, a position of the pulse within the symbol period conveying information;
- a second signal generator that generates a control pulse in response to a control signal;
- and
- an interleaver connected to the first and second signal generators, the interleaver:
- determining a position of a gap within the serial bit stream;
- and
- inserting the control pulse into the cap to output an interleaved signal.
7 more elements
A communications system comprising:
- a first signal generator that generates a serial bit stream in response to an input signal and a clock signal, the serial bit stream having a plurality of transitions and a plurality of gaps between transitions where transitions can not occur;
- a second signal generator that generates a control pulse in response to a control signal;
- an interleaver connected to the first and second signal generators, the interleaver:
- determining a position of a gap within the serial bit stream;
- and
- inserting the control pulse into the gap to output an interleaved signal;
- a communications channel connected to the interleaver;
- a clock recovery circuit connected to the communications channel to receive the interleaved signal, the clock recovery circuit outputting a recovered clock signal;
- and
- a de-interleaver connected to the communications channel to receive the interleaved signal, and the clock recovery circuit to receive the recovered clock signal, the de-interleaver removing the control pulse from the interleaved signal to output a received serial bit stream that represents a recovered version of the serial bit stream, and the serial bit stream from the interleaved signal to output a received control pulse that represents a recovered version of the control pulse.
7 more elements
A communications system comprising:
- a first signal generator to generate a series of first pulses, each first pulse in the series having a first edge, a second edge, and an equivalent pulse period;
- a second signal generator to generate a second pulse;
- and
- an interleaver connected to the first and second signal generators, the interleaver to detect the first edge of a first pulse of the series of first pulses in a pulse period, determine where the second edge of the first pulse can not occur during the pulse period, and insert the second pulse in the pulse period where the second edge of the first pulse can not occur.
1 more element
A method of communicating comprising:
- generating a series of first pulses, each first pulse in the series having a first edge, a second edge, and an equivalent pulse period;
- generating a second pulse;
- and
- detecting the first edge of a first pulse of the series of pulses in a pulse period, determining where the second edge of the first pulse can not occur in the pulse period, and inserting the second pulse in the pulse period where the second edge of the first pulse can not occur.
1 more element
Dependencies are inferred from the claim text.