Clock generating circuit and image-forming apparatus

An image-forming apparatus, comprising:

• an image-bearing member to bear a electrostatic latent image and/or a toner image on it;
• an image-writing device to scan a surface of said image-bearing member with a scanning-light deflected by a rotating polygon mirror;
• a modulating section that performs a pulse width modulation or a light-intensity modulation of dot clock pulses in response to image data to generate a scanning-light modulation signal to be fed to said image-writing device;
• a developing section that develops said electrostatic latent image, formed on said image-bearing member by said scanning-light, to form said toner image as a visual image;
• a transferring section to transfer said toner image borne on said image-bearing member to a transfer material;
• a fixing section to fix said toner image, transferred to said transfer material, onto said transfer material;
• a digital-delay dot clock adjusting section to generate first dot clock pulses having a predetermined number of pulses within a predetermined time interval at a constant exposing range of said image-writing section for making a correction against a deviation expanded or contracted, wherein each period of said first dot clock pulses is slightly increased or reduced by changing a successive selection for a plurality of delayed clock pulses, which are generated successively in slightly different delay times by delaying clock-pulses, outputted from a reference oscillator, in slightly different delay times;
• and
• a jitter suppressing section to suppress a jitter component included in said first dot clock pulses, wherein said jitter suppressing section divides said first dot clock pulses to generate second dot clock pulses, and then, multiplies said second dot clock pulses to generate said dot clock pulses.