Method and system for implementing multiple high precision and low precision interpolators for a graphics pipeline
AssigneeNVIDIA Corporation
InventorsEdward A. Hutchins, Brian K. Angell
Life of this patent
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AssigneeNVIDIA Corporation
InventorsEdward A. Hutchins, Brian K. Angell
Estimating the term…
A rasterizer stage configured to implement multiple interpolators for graphics pipeline. The rasterizer stage includes a plurality of simultaneously operable low precision interpolators for computing a first set of pixel parameters for pixels of a geometric primitive and a plurality of simultaneously operable high precision interpolators for computing a second set of pixel parameters for pixels of the geometric primitive. The rasterizer stage also includes an output mechanism coupled to the interpolators for routing computed pixel parameters into a memory array. Parameters may be programmably assigned to the interpolators and the results thereof may be programmably assigned to portions of a pixel packet.
A rasterizer stage comprising:
A method for implementing multiple high precision and low precision interpolators in a raster stage of a graphics pipeline, comprising:
In a portable handheld device, a computer system having a memory storing computer readable instructions, which when executed by the computer system, cause the computer system to implement multiple high precision and low precision interpolators in a raster stage of a graphics pipeline, comprising:
Dependencies are inferred from the claim text.