Design and operation of gate-enhanced junction varactor with gradual capacitance variation

A method comprising:

• selecting a varactor that comprises (a) a plate region and a body region of a semiconductor body, (b) a plate electrode and a body electrode respectively connected to the plate and body regions, (c) a gate dielectric layer situated over the semiconductor body and contacting the body region, and (d) a gate electrode situated over the gate dielectric layer at least where the gate dielectric layer contacts material of the body region, the plate and body regions being of opposite conductivity types, meeting each other to form a p-n junction, and extending to a primary surface of the semiconductor body, the plate region occupying a lateral plate area along the primary surface, the varactor having a minimum capacitance dependent on the plate area, a field insulating region extending into the semiconductor body along the primary surface to define a semiconductor island laterally surrounded by the field insulating region and substantially fully occupied by material of the plate and body regions, the semiconductor island occupying an island area along the primary surface, the varactor having a maximum capacitance dependent on the island area, the gate dielectric layer comprising multiple gate dielectric portions which are of different respective thicknesses and which at least partially overlie the body region, each gate dielectric portion extending to a location above the plate region or/and being continuous with a gate dielectric portion thinner than that gate dielectric portion;
• and
• adjusting the plate and island areas to control the minimum and maximum capacitances of the varactor.

A method comprising:

• selecting a varactor that comprises (a) a plate region and a body region of a semiconductor body, (b) a plate electrode and a body electrode respectively connected to the plate and body regions, (c) a gate dielectric layer situated over the semiconductor body and contacting the body region, and (d) a gate electrode situated over the gate dielectric layer at least where the gate dielectric layer contacts material of the body region, the plate and body regions being of opposite conductivity types, meeting each other to form a p-n junction, and extending to a primary surface of the semiconductor body, the plate region occupying a lateral plate area along the primary surface, the varactor having a minimum capacitance dependent on the plate area, a field insulating region extending into the semiconductor body along the primary surface to define a semiconductor island laterally surrounded by the field insulating region and substantially fully occupied by material of the plate and body regions, the semiconductor island occupying an island area along the primary surface, the varactor having a maximum capacitance dependent on the island area, the surface depletion region comprising multiple surface depletion portions of different respective average net dopant concentrations, each surface depletion portion meeting the plate region or/and being continuous with a surface depletion portion more lightly doped than that surface depletion portion;
• and
• adjusting the plate and island areas to control the minimum and maximum capacitances of the varactor.

A method comprising:

• selecting a varactor that comprises (a) a plate region and a body region of a semiconductor body, (b) a plate electrode and a body electrode respectively connected to the plate and body regions, (c) a gate dielectric layer situated over the semiconductor body and contacting the body region, and (d) a gate electrode situated over the gate dielectric layer at least where the gate dielectric layer contacts material of the body region, the plate and body regions being of opposite conductivity types, meeting each other to form a p-n junction, and extending to a primary surface of the semiconductor body, the plate region occupying a lateral plate area along the primary surface, the varactor having a minimum capacitance dependent on the plate area, a field insulating region extending into the semiconductor body along the primary surface to define a semiconductor island laterally surrounded by the field insulating region and substantially fully occupied by material of the plate and body regions, the semiconductor island occupying a lateral island area along the primary surface, the varactor having a maximum capacitance dependent on the island area, the gate electrode comprising multiple gate electrode portions which are of doped semiconductor material and which at least partially overlie the body region, each gate electrode portion being of different conductivity type or/and different average net dopant concentration than each other gate electrode portion;
• and
• adjusting the plate and island areas to control the minimum and maximum capacitances of the varactor.

A method comprising:

• providing a varactor that comprises (a) a plate region and a body region of a semiconductor body, (b) a plate electrode and a body electrode respectively connected to the plate and body regions, (c) a gate dielectric layer situated over the semiconductor body and contacting the body region, and (d) a gate electrode situated over the gate dielectric layer at least where the gate dielectric layer contacts material of the body region, the plate and body regions being of opposite conductivity types and meeting each other to form a p-n junction;
• applying (a) a plate-to-body voltage between the plate and body electrodes and (b) a gate-to-body voltage between the gate and body electrodes;
• and
• varying the plate-to body voltage in a selected positive or negative direction while maintaining the gate-to-body voltage approximately constant at a selected non-zero value to cause multiple portions of an inversion layer to progressively appear in the body region below the gate electrode, the inversion portions respectively corresponding to different transition values of the plate-to-body voltage at the non-zero value of the gate-to-body voltage, each inversion portion appearing/disappearing approximately at the corresponding transition value of the plate-to-body voltage and being electrically connected to the plate region directly or/and through at least one other of the inversion portions.