Stacked semiconductor die

A semiconductor die structure in a stacked semiconductor die assembly comprising:

• a first semiconductor die having an upper surface including at least one electrical contact, at least one region for mounting a second semiconductor die, and at least one adhesive flow control dam located between the at least one region for mounting a second semiconductor die and the at least one electrical contact, the at least one adhesive flow control dam for preventing adhesive applied in the at least one region of the first semiconductor die from contacting the at least one electrical contact during the mounting of the second semiconductor die onto the at least one region, the at least one adhesive flow control dam comprising at least one of a decoupling capacitor coupon and an adhesive flow control dam is configured to deform upon contact.

A semiconductor die for a stacked semiconductor die assembly comprising:

• a first semiconductor die having an upper surface including at least one electrical contact, at least one region for mounting a second semiconductor die, and at least one adhesive flow control dam positioned between the at least one region for mounting a second semiconductor die and the at least one electrical contact, the at least one adhesive flow control dam for preventing adhesive applied in the at least one region of the first semiconductor die from contacting the at least one electrical contact during the mounting of the second semiconductor die onto the at least one region, the at least one adhesive flow control dam comprising at least one of a decoupling capacitor coupon and a deformable dam.