Metallization structures for semiconductor device interconnects, methods for making same, and semiconductor devices including same
AssigneeMicron Technology, Inc.
InventorSalman Akram
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AssigneeMicron Technology, Inc.
InventorSalman Akram
Estimating the term…
The present invention provides a metallization structure for semiconductor device interconnects such as a conductive line, and methods for making the same, wherein the metallization structure includes a substrate with a substantially planar upper surface, a foundation metal layer disposed on a portion of the substrate upper surface, a primary conducting metal layer overlying the foundation metal layer, and a metal spacer on the sidewalls of the primary conducting metal layer and the foundation metal layer. The present invention also provides a metallization structure and a method for making the same, wherein the metallization structure includes a substrate with a foundation metal layer disposed thereon, a dielectric layer with an aperture therethrough being disposed on the substrate, where the bottom of the aperture exposes the foundation metal layer of the substrate and a metal spacer on the sidewall of the aperture and a line or plug of a primary conducting metal filling the remaining portion of the aperture. These metallization structures are useful for reducing the incidence and severity of thermally induced stress voids.
A metallization structure for a semiconductor device, comprising:
A metallization structure for a semiconductor device, composing:
A metallization structure for a semiconductor device, comprising:
A structure for transmitting a signal across a semiconductor device, the structure comprising:
A structure for transmitting a signal laterally across a substrate of a semiconductor device, the structure comprising:
A structure for transmitting a signal laterally across a substrate of a semiconductor device, the structure comprising:
Dependencies are inferred from the claim text.