Sacrificial TiN arc layer for increased pad etch throughput

A method of manufacturing a semiconductor device, wherein the method comprises:

• forming a final layer of metal on a layer of interlayer dielectric in the semiconductor device;
• forming a layer of TiN on the final layer of metal;
• forming a first layer of photoresist on the layer of TiN;
• patterning and developing the first layer of photoresist exposing portions of the layer of TiN;
• etching holes in the layer of TiN the final layer of metal exposing portions of the interlayer dielectric, wherein metal structures are formed;
• removing the first layer of photoresist;
• removing remaining portions of the layer of TiN;
• and
• forming a blanket layer of interlayer dielectric on the surface of the semiconductor device;
• forming as second layer of photoresist on the blanket layer of interlayer dielectric;
• patterning and developing the second layer of photoresist exposing portions of the blanket layer of interlayer dielectric overlying metal structures;
• and
• etching the exposed portions of the blanket layer of interlayer dielectric overlying metal structures;
• and
• etching the exposed portions of the blanket layer of interlayer dielectric down to the metal structures.