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US 7,068,058 B2Granted
Semiconductor integrated circuit device with test element group circuit
AssigneeSamsung Electronics Co., Ltd.
InventorsChul-Sung Park, Yong-Hwan Noh, Byong-Kwon Lee, Hyang-Ja Yang
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Abstract
Disclosed is a semiconductor integrated circuit device which includes a test element group circuit connected between a first and a second pad. The test element group circuit includes a plurality of semiconductor devices connected in series between the first and second pads. At least two adjacent ones of the semiconductor devices are connected to each other via a signal path that is formed by a multi-layer interconnection structure.
Claims2
A semiconductor integrated circuit device comprising:
- a first pad and a second pad;
- and
- a test element group circuit connected between the first pad and the second pad to allow measuring of electrical characteristics of the semiconductor integrated circuit device;
- wherein the test element group circuit includes a plurality of inverters connected between the first pad and the second pad and at least two of the inverters are electrically connected to each other via a signal path formed by a multi-layer interconnection structure, wherein said multi-layer interconnection structure of said signal path is comprised of at least three interconnection layers.
1 more element
Dependencies are inferred from the claim text.