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AssigneeAgere Systems Inc.
InventorsRobert Y S Huang, Scott Jessen, Subramanian Karthikeyan, Joshua Jia Li, Isaiah O. Oladeji, Kurt George Steiner, Joseph Ashley Taylor
Estimating the term…
A mask layer having four mask films used in the fabrication of an interconnect structure of a semiconductor device. The first mask film and the third mask film have substantially equal etch rates. The second mask film and the fourth have substantially equal etch rates film, and different from that of the etch rate of the first and third mask films. A via is etched to the first mask film. Then a trench is etched to the third mask film of the mask layer. The via and trench are then etched in a dielectric material. The second, third and fourth mask films are removed and the first mask film remains a passivation layer for the dielectric material. A conductive metal is deposited in the via and trench.
A method for avoiding effects due to a misalignment that may occur between features in an interconnect structure of a semiconductor device, the interconnect structure having a dielectric material deposited over an underlying interconnect layer and having a via extending through the dielectric material for establishing a connection between an underlying conductor and a trench in an upper portion of the dielectric material, said method comprising the steps of:
A method for avoiding effects due to a misalignment that may occur between features in an interconnect structure using a mask layer deposited over a dielectric material which has been deposited over an underlying interconnect layer, said method comprising the steps of:
A semiconductor device having a dielectric material deposited over an underlying interconnect layer, said semiconductor comprising:
Dependencies are inferred from the claim text.