Method for releasing stress during semiconductor device fabrication
AssigneeHynix Semiconductor Inc.
InventorsByung-Seop Hong, Jae-Geun Oh
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Abstract
A semiconductor device and a method for releasing stress exerted while fabricating the semiconductor device. The method for releasing the stress, includes forming a stack layer deposited on a semiconductor sequentially with a gate oxide layer, a poly-silicon layer, a tungsten layer, and a hard mask; selectively oxidizing, wherein only the poly-silicon layer of the stack layer is oxidized; heat treating for releasing stress exerted during the selective oxidation process; and forming a gate sealing nitride layer on the stack layer heat-treated.
Claims23
A method for fabricating a semiconductor device, comprising:
- forming a stack layer of a gate layer, a poly-silicon layer, a tungsten layer, and a hard mask sequentially deposited on a semiconductor substrate;
- carrying out a selective oxidation process adopting a rapid thermal process (RTP), wherein the poly-silicon layer of the stack layer is only oxidized;
- performing a heat treatment process by slowly increasing a temperature of a LPCVD furnace from a room temperature to a target temperature for the heat treatment process and keeping the target temperature in a vacuum ambient;
- decreasing the temperature of the LPCVD furnace from the target temperature for the heat treatment process to a target temperature for depositing a gate sealing nitride layer;
- and
- carrying out a process for forming the gate sealing nitride layer on the heat treated stack layer.
A method for fabricating a semiconductor device, comprising:
- forming a stack layer of a gate oxide layer, a poly-silicon layer, a tungsten layer, and a hard mask sequentially deposited on a semiconductor substrate;
- carrying out a selective oxidation process, wherein the poly-silicon layer of the stack layer is only oxidized;
- depositing a gate sealing nitride layer on the stack layer selectively oxidized by low pressure chemical vapor deposition (LPCVD);
- performing a heat treatment process by slowly increasing a temperature of another LPCVD furnace or an annealing furnace from a room temperature to a target temperature for the heat treatment process and maintaining the target temperature in a vacuum or inert gas ambient of an LPCVD furnace or an annealing furnace for releasing a stress exerted during the selective oxidation process and gate sealing nitride layer deposition process;
- decreasing the temperature of the LPCVD furnace from the target temperature for the heat treatment to a room temperature;
- and
- performing a rapid thermal process (RTP) for activating source/drain regions of the semiconductor device.
Dependencies are inferred from the claim text.