Multi-layer overlay measurement and correction technique for IC manufacturing
AssigneeAdvanced Micro Devices, Inc.
InventorsKhoi A. Phan, Bharath Rangarajan, Bhanwar Singh
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Abstract
A system facilitating measurement and correction of overlay between multiple layers of a wafer is disclosed. The system comprises an overlay target that represents overlay between three or more layers of a wafer and a measurement component that determines overlay error existent in the overlay target, thereby determining overlay error between the three or more layers of the wafer. A control component can be provided to correct overlay error between adjacent and non-adjacent layers, wherein the correction is based at least in part on measurements obtained by the measurement component.
Claims30
A system that facilitates measurement and correction of overlay between multiple layers of a wafer, comprising:
- an overlay target that represents overlay between three or more layers of a wafer;
- a measurement component that determines overlay error existent in the overlay target, and determines overlay error between the three or more layers of the wafer, where the measurement component comprises a comparison component that compares a captured signature with one or more stored signatures to facilitate determination of overlay error existent in the overlay target;
- and
- a control component that utilizes the overlay error determined by the measurement component to correct overlay error between the three or more layers of the wafer, the control component facilitating concurrent overlay correction of two or more wafers.
A method for measuring and correcting overlay error in more than two layers of a wafer, the method comprising:
- generating a multi-layered overlay target, wherein disparate layers of the overlay target represent disparate layers of the wafer;
- delivering light incident to the overlay target;
- capturing a signature that results from the incident light contacting the overlay target;
- comparing the captured signature with one or more stored signatures to facilitate determination of overlay error existent in the overlay target;
- approximating overlay error between layers on a wafer via measuring overlay error between representative layers of the overlay target;
- correcting overlay error between layers of a wafer based at least in part on the measured overlay error existent in the representative layers of the overlay target;
- and
- facilitating concurrent overlay correction of two or more wafers based at least in part upon the measured overlay error.
A system that corrects overlay error between three or more layers of at least one wafer, comprising:
- means for creating an overlay target, the overlay target representing three or more layers of a wafer;
- means for delivering light incident to the overlay target;
- means for capturing a signature that results from the light incident to the overlay target;
- means for comparing the captured signature with one or more stored signatures to determine overlay error in the overlay target;
- and
- means for concurrently correcting overlay error between non-adjacent layers of the at least one wafer based at least in part on the measurements relating to the overlay target.
A system for correcting overlay error between three or more layers of at least one wafer, where the system comprises:
- a measurement component that comprises:
- a light emitting component that delivers light incident to the overlay target;
- a light capturing component utilized to capture a signature that results from the incident light contacting the overlay target;
- and
- a comparison component that compares a captured signature with one or more stored signatures to determine overlay error associated with the overlay target;
- and
- a receiving component that receives measurements associated with overlay error between three or more layers of the wafer;
- and
- a control component that effectuates a concurrent overlay error correction in a first dimension between adjacent layers of the at least one wafer corresponding to a substantially similar overlay error correction in a second dimension between non-adjacent layers of the at least one wafer.
Dependencies are inferred from the claim text.