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US 7,064,377 B2Granted
Flash memory cell with buried floating gate and method for operating such a flash memory cell
AssigneeInfineon Technologies AG
InventorsPeter Hagemeyer, Wolfram Langheinrich
Life of this patent
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Abstract
A programmable read-only memory cell and method of operating the programmable read-only memory cell. In one embodiment, the programmable read-only memory cell comprises a floating gate arranged in a trench, an epitaxial channel layer formed on the floating gate, the channel layer connecting a source electrode to a drain electrode, and a selection gate arranged above the channel line.
Claims8
A programmable read-only memory cell, comprising:
- a source electrode;
- a drain electrode;
- a channel layer formed between the source electrode and the drain electrode;
- a floating gate isolated from the channel layer;
- and
- a selection gate isolated from the channel layer, wherein the selection gate and the floating gate are arranged on opposite sides of the channel layer, and wherein a first insulator layer is arranged between the floating gate and the channel layer and a second insulator layer is arranged between the selection gate and the channel layer;
- wherein the floating gate is arranged at least partly in a trench of a substrate, wherein the trench is formed between the source electrode and the drain electrode, and wherein the floating gate is electrically insulated from the substrate;
- and
- wherein a trench capacitor is formed in the substrate, an inner electrode of said trench capacitor being formed by the floating gate and an outer electrode of said capacitor being formed by a first diffusion region.
6 more elements
A programmable read-only memory cell, comprising:
- a floating gate disposed in a trench of a substrate;
- a channel layer formed over the floating gate, connecting a source electrode to a drain electrode;
- a selection gate disposed above the channel layer;
- a first insulator layer disposed between the floating gate and the channel layer;
- a second insulator layer disposed between the selection gate and the channel layer;
- an insulator layer disposed between the floating gate and the substrate;
- and
- a trench capacitor, formed in the substrate, comprising an inner electrode formed by the floating gate and an outer electrode formed by a first diffusion region disposed between the insulator layer and the substrate.
5 more elements
Dependencies are inferred from the claim text.