Bipolar transistor and method for fabricating it
AssigneeInfineon Technologies AG
InventorsMartin Franosch, Thomas Meister, Herbert Schaefer, Reinhard Stengl
Life of this patent
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Abstract
A method is provided to fabricate a bipolar transistor with a low base connection resistance, low defect density and improved scalability. Scalability is to be understood in this case as both the lateral scaling of the emitter window and the vertical scaling of the base width (low temperature budget). The temperature budget can be kept low in the base region since no implantations are required in order to reduce the base connection resistance. Furthermore, the difficulties associated with the point defects are largely avoided.
Claims21
A method for fabricating a bipolar transistor, comprising the steps of:
- providing a semiconductor substrate with a collector, a base and a lightly doped emitter layer;
- applying a mask to the lightly doped emitter layer;
- etching the lightly doped emitter layer wet-chemically with aid of the mask to form a lightly doped emitter and to form an uncovered region of the base;
- forming a base connection on at least a portion of the uncovered base region;
- and
- removing the mask and forming a highly doped emitter.
A method for fabricating a bipolar transistor, comprising the steps of:
- providing a semiconductor substrate with a collector, a base and a lightly doped emitter layer;
- applying a mask to the lightly doped emitter layer, said mask comprising an oxide layer, a silicon layer and a nitride layer;
- etching the lightly doped emitter layer wet-chemically with aid of the mask to form a lightly doped emitter and to form an uncovered region of the base;
- forming a base connection on at least a portion of the uncovered base region;
- and
- removing the mask and forming a highly doped emitter.
A method for fabricating a bipolar transistor, comprising the steps of:
- providing a semiconductor substrate with a collector, a base and a lightly doped emitter layer, said emitter layer being formed above the base as a substantially monocrystalline layer;
- applying a mask to the lightly doped emitter layer;
- etching the lightly doped emitter layer wet-chemically with aid of the mask to form a lightly doped emitter and to form an uncovered region of the base, the wet chemical etching stopping on faces (111) in said substantially monocrystalline layer;
- forming a base connection on at least a portion of the uncovered base region;
- and
- removing the mask and forming a highly doped emitter.
A method for fabricating a bipolar transistor, comprising the steps of:
- providing a semiconductor substrate with a collector, a base and a lightly doped emitter layer;
- applying a mask to the lightly doped emitter layer;
- etching the lightly doped emitter layer wet-chemically with aid of the mask to form a lightly doped emitter and to form an uncovered region of the base the wet chemical etching stopping on faces (111) in said substantially monocrystalline layer;
- forming a base connection on at least a portion of the uncovered base region, the base connection being formed by a selective epitaxy on the uncovered regions of the base;
- and
- removing the mask and forming a highly doped emitter.
A bipolar transistor, comprising:
- a semiconductor substrate with a collector which is laterally bounded by an insulation layer, a base formed by differential epitaxy on the collector and on the insulation layer, a lightly doped emitter, a highly doped emitter and a sidewall spacer on a sidewall of the highly doped emitter therein;
- an epitaxial base contact formed in a region on the base which provides a connection to the base, the connection being oriented substantially parallel to the lightly doped emitter, the epitaxial base contact being isolated from the highly doped emitter by the sidewall spacer and from the lightly doped emitter by at least one of the sidewall spacer and a pn-junction;
- and
- an upper edge of the epitaxial base contact being above a lower edge of the sidewall spacer.
A method for fabricating a bipolar transistor, comprising the steps of:
- providing a semiconductor substrate with a collector, a base and a lightly doped emitter layer;
- applying a mask to the lightly doped emitter layer;
- etching the lightly doped emitter layer wet-chemically with aid of the mask to form a lightly doped emitter, the wet-chemical etching stopping on (111) faces of said lightly doped emitter layer and to form an uncovered region of the base;
- producing a sidewall spacer on sidewalls of the mask;
- forming a base connection on at least a portion of the uncovered base region;
- and
- removing the mask and forming a highly doped emitter.
Dependencies are inferred from the claim text.