High speed differential voltage controlled oscillator

A differential negative resistance voltage controlled oscillator (VCO), comprising:

• a resonator having first and second terminals that generate a differential oscillation signal with first and second polarity signals;
• first and second capacitors for sampling an oscillation signal to develop a differential Output signal;
• and
• a differential negative resistance source coupled to said resonator, comprising:
• first and second transistors, each having a controlled first and a second current path and a control terminal, wherein said control current path of each of said first and second transistors is coupled to a respective one of said first and second polarity signals of said differential oscillation signal;
• and
• a capacitive degeneration circuit including at least one capacitive device coupled to said controlled current paths of first and second transistors that has a capacitance value selected so that the negative resistance source has only negative resistance and the reactive component of impedance is eliminated;
• and
• first and second current sinks, each coupled to a corresponding one of said controlled current paths of said first and second transistors, wherein said first and second current sinks each comprise:
• a current sink transistor having an emitter, a collector coupled to an emitter of a respective one of said first and second transistors, and a base coupled to a bias voltage.

A differential negative resistance voltage controlled oscillator (VCO), comprising:

• a resonator having first and second terminals that generate a differential oscillation signal with first and second polarity signals;
• a differential negative resistance source coupled to said resonator, comprising:
• first and second transistors, each having a controlled current path and a control terminal, wherein said control current path of each of said first and second transistors is coupled to a respective one of said first and second polarity signals of said differential oscillation signal;
• and
• a capacitive degeneration circuit coupled to said controlled current paths of first and second transistors, said capacitive degeneration circuit operative to cancel at least a portion of extra capacitance of said differential negative resistance source applied to said resonator;
• wherein said first transistor comprises a first BJT having a collector coupled to said first polarity of said differential oscillation signal and an emitter coupled to said capacitive degeneration circuit;
• said second transistor comprises a second BJT having a collector coupled to said second polarity of said differential oscillation signal and an emitter coupled to said capacitive degeneration circuit;
• said capacitive degeneration circuit further comprising:
• a capacitive network coupled between emitters of said first and second BJTs;
• and
• first and second current sinks, each coupled to an emitter of a respective one of said first and second BJTs;
• wherein said first and second current sinks each comprises:
• a current sink transistor having an emitter, a collector coupled to an emitter of a respective one of said first and second BJTs and a base coupled to a bias voltage;
• a resistor coupled between said emitter of said current sink transistor and ground;
• and
• a capacitor coupled between said base current sink transistor and ground.

A method of optimizing operation of a differential VCO having a differential resonator with a differential oscillation output, comprising:

• coupling a differential output of a differential pair of transistors to the differential oscillation output;
• splitting the differential pair of transistors into first and second transistors by disconnecting common current terminals;
• coupling a first DC bias current sink to a current terminal of the first transistor and coupling a second DC bias current sink to a current terminal of the second transistor, wherein coupling each of said first and second DC bias current sinks to said first and second transistors respectively comprises coupling an emitter of each of the first and second transistors to a collector of respective current sink transistor and a base of each of the respective current sink transistors to a bias voltage;
• and
• adding at least one capacitor between the current terminals of the first and second transistors to thereby cancel at least a portion of extra capacitance of the differential output applied to the differential resonator, wherein the capacitor has a capacitance value selected so that the differential output has only negative resistance and the reactive component of impedance is eliminated.