Mask pattern and method for forming resist pattern using mask pattern thereof
AssigneeSharp Kabushiki Kaisha
InventorShinji Kobayashi
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Abstract
A mask pattern for multiple exposure for forming a resist pattern with an unvarying pattern pitch on a semiconductor wafer, which is utilized as in case where a mask pattern under a design having the width of an aperture pattern smaller than the width of a light-shielding pattern is used at one exposure, wherein the mask pattern for multiple exposure has a pattern pitch that is the same as that of the mask pattern under design and has the width of an aperture pattern greater than the width of a light-shielding pattern.
Claims7
A multiple exposure mask pattern for multiple exposures for forming a resist pattern with an unvarying pattern pitch on a semiconductor wafer, which is utilized instead of a one exposure mask pattern having a width of an aperture pattern of the one exposure mask smaller than a width of a light-shielding pattern of the one exposure mask, wherein the multiple exposure mask pattern for multiple exposures comprises an aperture pattern and a light-shielding pattern with apertures between light-shielding portions, where the multiple exposure mask pattern has a pattern pitch that is the same as that of the one exposure mask pattern and has a width of the aperture pattern of the multiple exposure mask pattern that is greater than a width of the light-shielding pattern of the multiple exposure mask pattern.
Dependencies are inferred from the claim text.