Method for fabricating transistor with polymetal gate electrode

A method for fabricating a semiconductor device with a polymetal gate electrode structure, the method comprising:

• forming a gate oxide layer on a substrate;
• forming a gate stack structure by sequentially stacking and subsequently etching a polysilicon layer, a diffusion barrier layer, a tungsten layer and a hard mask insulation layer on the gate oxide layer;
• forming a silicon oxide layer on a surface of the gate oxide layer exposed by the etching and along a profile containing the gate stack structure by performing an atomic layer deposition (ALD) technique at a predetermined temperature that prevents oxidation of the barrier layer or tungsten layer, or both;
• and
• performing a gate re-oxidation process.

A method for fabricating a semiconductor device, the method comprising:

• forming a gate oxide layer on a substrate;
• forming a gate stack structure on gate oxide layer, the gate stack structure including a polysilicon layer, a diffusion barrier layer, a metal layer, and a hard mask insulation layer;
• forming a silicon oxide layer along a profile of the gate stack structure at a predetermined temperature that prevents oxidation of the barrier layer or metal layer, or both, the predetermined temperature being no more than about 400° C., wherein the silicon oxide layer is formed using an atomic layer deposition (ALD) technique;
• and
• performing a gate re-oxidation process after the formation of the silicon oxide layer.