Method of fabricating a flash memory cell

A method of forming a flash memory cell, the method comprising:

• forming a tunnel oxide layer, a floating gate layer, and a dielectric layer on a substrate in sequence;
• forming a control gate layer on the dielectric layer;
• etching the control gate layer to form two control gates;
• oxidizing the control gates to form a plurality of first oxide layers on surfaces of the control gates and aside the control gates;
• etching the dielectric layer and the floating gate layer by utilizing the first oxide layers as a mask to form floating gates underneath the control gates;
• implanting ions into the substrate to form a source between the floating gates;
• oxidizing the floating gates and the substrate to form a plurality of second oxide layers aside the floating gates and to form a third oxide layer on a surface of the source;
• and
• forming an erasing gate on the third oxide layer, the erasing gate drawing electrons from either of the floating gates of the flash memory cell in an erasing operation.