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US 7,023,080 B2Granted
Semiconductor integrated circuit with dummy patterns
AssigneeFujitsu Limited
InventorsHiroyuki Ozawa, Hashimoto Kenji, Hideaki Yamauchi
Life of this patent
Estimating the term…
Abstract
A semiconductor integrated circuit includes a plurality of layers provided on a semiconductor substrate, wires provided in a first layer that is one of the plurality of layers, and wire dummies provided in a second layer different from the first layer and having an arrangement that avoids areas overlapping positions of the wires.
Claims3
A semiconductor integrated circuit, comprising:
- a plurality of layers provided on a semiconductor substrate;
- signal wires provided in a first layer that is one of said plurality of layers;
- a power supply wire provided in the first layer or another layer that is one of said plurality of layers;
- and
- wire dummies provided in a second layer different from the first layer and said another layer by avoiding areas that are directly above or below positions of said signal wires provided in said first layer, at least some of said wire dummies being positioned in areas that are directly above or below positions of said power supply wire.
2 more elements
A semiconductor integrated circuit, comprising:
- a plurality of layers provided on a semiconductor substrate;
- wires provided in a first layer that is one of said plurality of layers;
- polysilicon wires;
- diffusion regions;
- and
- wire dummies provided in a second layer different from the first layer by avoiding areas that are directly above or below positions of said wires provided in said first layer, wherein said wire dummies further avoid areas that are directly above positions of polysilicon wires or diffusion regions.
3 more elements
Dependencies are inferred from the claim text.