US 7,022,600 B2 · Method of forming dual damascene interconnection using low-k dielectric material

Abstract

In order to avoid a faulty pattern resulting from a photoresist tail being formed due to a step difference of an upper hard mask layer when a dual hard mask layer is used, a planarization layer is formed following patterning of the upper hard mask layer. In this manner, a photoresist pattern is formed without the creation of a photoresist tail. Alternatively, a single hard mask layer and a planarization layer are substituted for the dual lower hard mask layer and an upper hard mask layer, respectively. In this manner, it is therefore possible to form a photoresist pattern without a photoresist tail being formed during photolithographic processes. In order to prevent formation of a facet, the planarization layer is thickly formed or, alternatively, the hard mask layer is etched using the photoresist pattern.

Claims12

Dependent claims

A method of forming a damascene interconnection, comprising:

(a) sequentially forming an interlayer dielectric and a hard mask layer on a semiconductor substrate;
(b) successively patterning the hard mask layer and the interlayer dielectric to form a hole exposing a predetermined portion of the semiconductor substrate;
(c) forming a planarization layer in the hole and on the hard mask layer, the planarization layer having a planar top surface extending across the hole;
(d) patterning the planarization layer and the hard mask layer to form a groove opening, wherein the groove opening is wider than the hole and exposes a top surface of the interlayer dielectric adjacent to the hole;
and
(e) etching the exposed interlayer dielectric to form a groove in the interlayer dielectric, wherein the patterned planarization layer is removed before etching the exposed interlayer dielectric and wherein the groove is wider than the hole and a depth of the groove is smaller than a thickness of the interlayer dielectric.

3 more elements

Dependencies are inferred from the claim text.

Method of forming dual damascene interconnection using low-k dielectric material

Life of this patent

Method of forming dual damascene interconnection using low-k dielectric material

Life of this patent

Abstract

Claims12