Method for a parallel production of an MOS transistor and a bipolar transistor

Method for parallel production of a MOS transistor in an MOS area of a substrate and a bipolar transistor in a bipolar area of the substrate, comprising:

• a) generating a MOS preparation structure in the MOS area, wherein the MOS preparation structure comprises an area provided for a channel, a gate dielectric, a gate electrode layer and a mask layer on the gate electrode layer;
• b) generating a bipolar preparation structure in the bipolar area, wherein the bipolar preparation structure comprises a conductive layer and a mask layer on the conductive layer;
• c) common structuring of the gate electrode layer and the conductive layer by using the mask layers for defining a gate electrode in the MOS area and a base terminal area and/or emitter collector terminal area in the bipolar area;
• d) thinning the mask layer in the area of the gate electrode, so that a thinned mask layer remains in the area of the gate electrode;
• and
• e) doping the conductive layer in the area of the gate electrode across the thinned mask layer.