Single polisilicon emitter bipolar junction transistor processing technique using cumulative photo resist application and patterning
AssigneeFairchild Semiconductor Corporation
InventorsSteven M. Leibiger, Laurence M. Szendrei, Mark A. Doyle
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Abstract
A process for forming a bipolar transistor where the doping implantation of the extrinsic base regions does not affect the emitter doping levels. The techniques is to not remove the photoresist layer used to define the poly emitter contact. The photoresist layer for defining the extrinsic base regions overlays the photoresist layer over the emitter poly. When the base photoresist is processed to expose the base regions the photoresist over the emitter poly remains in tact. In this arrangement the base implantation is prevented from driving through the emitter poly and affecting the doping levels in the emitter.
Claims6
A process for forming a quasi-self-aligned bipolar transistor structure having an emitter region and an extrinsic base region, the process comprising the steps of:
- applying a first photoresist on a semiconductor wafer;
- defining the emitter region via a first mask;
- exposing, developing, and curing the photoresist with respect to the first mask;
- etching the underlying emitter region using the pattern;
- applying a second photoresist to the surface of the semiconductor wafer;
- applying a second mask that laterally spaces the extrinsic base implant region from the emitter region,
- exposing and developing the second photoresist using the second mask;
- and
- implanting the extrinsic base region wherein the first and second photoresist layers block the extrinsic base implant from affecting the emitter region.
Dependencies are inferred from the claim text.