Method for creating mask pattern for circuit fabrication and method for verifying mask pattern for circuit fabrication

A method for creating mask pattern data for fabricating a circuit, comprising:

• a first step of dividing original mask pattern data into a first plurality of regions each having a first size;
• a second step of performing optical proximity correction on each of the first plurality of regions obtained in the first step and creating first mask pattern data based on each of the first plurality of regions processed by the optical proximity correction;
• a third step of dividing the original mask pattern data into a second plurality of regions each having a second size which is different from the first size;
• a fourth step of performing optical proximity correction on each of the second plurality of regions obtained in the third step and creating second mask pattern data based on each of the second plurality of regions processed by the optical proximity correction;
• a fifth step of comparing the first mask pattern data and the second mask pattern data and creating comparison result data;
• and
• a sixth step of determining whether or not a graphic pattern included in the comparison result data created in the fifth step has a size within a prescribed range;
• and
• a seventh step of, when it is determined that the graphic pattern has a size within the prescribed range as a result of the comparison performed in the sixth step, setting the first mask pattern data or the second mask pattern data as the mask pattern data for fabricating the circuit;
• and when it is determined that the graphic pattern has a size outside the prescribed range as a result of the comparison performed in the sixth step, deleting a portion of the graphic pattern which is outside the prescribed range from the first mask pattern data or the second mask pattern data so as to create the mask pattern data for fabricating the circuit.

A method for verifying mask pattern data for fabricating a circuit, comprising:

• a first step of dividing original mask pattern data into a first plurality of regions each having a first size;
• a second step of performing optical proximity correction on each of the first plurality of regions obtained in the first step and creating corrected mask pattern data based on each of the first plurality of regions processed by the optical proximity correction;
• a third step of dividing the original mask pattern data into a second plurality of regions each having a second size which is different from the first size;
• a fourth step of performing optical proximity correction on each of the second plurality of regions obtained in the third step and creating mask pattern data for verification based on each of the second plurality of regions processed by the optical proximity correction;
• a fifth step of comparing the corrected mask pattern data and the mask pattern data for verification;
• and
• a sixth step of, when it is determined that there is no non-matching data representing a non-matching portion between the corrected mask pattern data and the mask pattern data for verification as a result of the comparison performed in the fifth step, determining that the corrected mask pattern data has been properly corrected and setting the corrected mask pattern data as the mask pattern data for fabricating the circuit;
• and when it is determined that there is non-matching data, determining that the corrected mask pattern data has not been properly corrected and deleting the non-matching data from the corrected mask pattern data so as to create the mask pattern data for fabricating the circuit.

A method for verifying mask pattern data for fabricating a circuit, comprising:

• a first step of dividing original mask pattern data into a first plurality of regions each having a first size;
• a second step of performing optical proximity correction on each of the first plurality of regions obtained in the first step and creating corrected mask pattern data based on each of the first plurality of regions processed by the optical proximity correction;
• a third step of dividing the original mask pattern data into a second plurality of regions each having a second size which is different from the first size;
• a fourth step of performing optical proximity correction on each of the second plurality of regions obtained in the third step and creating mask pattern data for verification based on each of the second plurality of regions processed by the optical proximity correction;
• a fifth step of comparing the corrected mask pattern data and the mask pattern data for verification and creating comparison result data;
• and
• a sixth step of determining whether or not a graphic pattern included in the comparison result data created in the fifth step has a size within a prescribed range;
• and
• a seventh step of, when it is determined that the graphic pattern has a size within the prescribed range as a result of the comparison performed in the sixth step, determining that the corrected mask pattern data has been properly corrected and setting the corrected mask pattern data as the mask pattern data for fabricating the circuit;
• and when it is determined that the graphic pattern has a size outside the prescribed range as a result of the comparison performed in the sixth step, determining that the corrected mask pattern data has not been properly corrected and deleting a portion of the graphic pattern which is outside the prescribed range from the corrected mask pattern data so as to create the mask pattern data for fabricating the circuit.