Non-volatile semiconductor memory and process of fabricating the same
AssigneeSharp Kabushiki Kaisha
InventorsNaoki Ueda, Yasuhiro Sugita, Yoshimitsu Yamauchi
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AssigneeSharp Kabushiki Kaisha
InventorsNaoki Ueda, Yasuhiro Sugita, Yoshimitsu Yamauchi
Estimating the term…
A non-volatile semiconductor memory including at least one first gate electrode as a floating gate on a semiconductor substrate with intervention of a first insulating film as a tunnel oxide film; sidewall spacers on both sidewalls of the first gate electrode in a direction of a channel length; a bit line formed of an impurity diffusion region of a conductivity type different from the conductivity type of the semiconductor substrate in a surface layer of the semiconductor substrate by the side of the first gate electrode, wherein the bit line comprises a first bit line formed in self-alignment using the first gate electrode as a mask and a second bit line formed in self-alignment using the first gate electrode and the sidewall spacers as a mask.
A non-volatile semiconductor memory comprising:
A non-volatile semiconductor memory comprising:
A non-volatile semiconductor memory comprising:
Dependencies are inferred from the claim text.