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US 6,985,000 B2Granted
Thermal control of a DUT using a thermal control substrate
AssigneeDelta Design, Inc.
InventorsJan Feder, Rick Beyerle, Stephen Byers, Thomas Jones
Life of this patent
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Abstract
A solid state thermal control device contains a substrate and a plurality of solid state thermal elements on the substrate. The thermal elements are adapted to provide thermal control to a device under test (DUT). Each solid state thermal element contains at least one solid state heater and an active control circuit adapted to control a thermal output of the heater. Optionally, the each thermal element may also include a solid state temperature sensor.
Claims46
A solid state thermal control device, comprising:
- a substrate;
- and
- a plurality of substantially thermally isolated solid state thermal elements on the substrate adapted to provide thermal control to a device under test (DUT);
- wherein each solid state thermal element comprises:
- (a) at least one solid state heater;
- and
- (b) a control logic circuit adapted to control a thermal output of the solid state heater.
4 more elements
A semiconductor wafer testing system, comprising:
- (a) thermal control wafer, comprising:
- a semiconductor wafer substrate;
- a plurality of solid state thermal elements on the substrate adapted to provide thermal control to a wafer under test (WUT), wherein each thermal element comprises at least one solid state heater and a control logic circuit adapted to control a thermal output of the solid state heater;
- (b) an electrical testing or bum-in processing probe located opposite a first side of the thermal control wafer, such that a wafer under test (WUT) location opening is created between the thermal control wafer and the probe;
- and
- (c) a thermal reservoir located in thermal contact with a second side of the thermal control wafer.
3 more elements
A method of testing a DUT, comprising:
- placing a first side of a DUT in thermal contact with a thermal control substrate containing a plurality of solid state thermal elements;
- placing an electrical testing probe in contact with a second surface of the DUT;
- performing electrical testing or bum-in processing of the DUT, wherein the DUT in an unheated state has at least one of a non-uniform spatial and temporal temperature or power dissipation during the testing;
- and
- heating the DUT using the solid state thermal elements such that the DUT has a substantially uniform respective spatial, temporal or spatial and temporal temperature profile during testing.
2 more elements
Dependencies are inferred from the claim text.