Method for manufacturing semiconductor device
AssigneeSeiko Epson Corporation
InventorShinichi Fukada
Life of this patent
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Abstract
The invention provides a method for manufacturing a semiconductor device by which product performance and working efficiency can be improved while increasing a capacitor area of cross-point FeRAM. By using a first mask formed on a lower electrode layer forming film, a lower electrode is formed and processed and the lower electrode 2A can be exposed on a first insulating layer. By using a second mask formed on an upper electrode supporting layer forming film, a ferroelectric layer and an upper electrode supporting layer can be formed and processed and the upper electrode supporting layer can be exposed on a second insulating layer.
Claims7
A method for manufacturing a semiconductor device that includes a ferroelectric capacitor provided at an intersection of a lower electrode layer extending in a first direction and an upper electrode layer extending in a second direction, the method comprising:
- depositing a lower electrode layer forming film on a semiconductor substrate;
- depositing a lower electrode layer forming mask on the lower electrode layer forming film;
- forming the lower electrode layer extending in the first direction by processing the lower electrode layer forming film with the lower electrode layer forming mask;
- forming an insulating layer on the semiconductor substrate where the lower electrode layer has been formed in the presence of the lower electrode layer forming mask;
- exposing an upper surface of the lower electrode layer forming mask by performing a planarization on the insulating layer;
- removing the lower electrode layer forming mask that has been exposed so as to leave the insulating layer;
- and
- depositing a ferroelectric layer forming film and an upper electrode layer forming film in this order on the insulating layer where the lower electrode layer forming mask has been removed.
A method for manufacturing a semiconductor device that includes a ferroelectric capacitor provided at an intersection of a lower electrode layer extending in a first direction and an upper electrode layer extending in a second direction, the method comprising:
- depositing a ferroelectric layer forming film and an upper electrode supporting layer forming film in this order on a semiconductor substrate where the lower electrode layer extending in the first direction has been formed;
- depositing an upper electrode supporting layer forming mask on the upper electrode supporting layer forming film;
- forming an upper electrode supporting layer above the lower electrode layer that is at least to be a region where the ferroelectric capacitor is formed by processing the upper electrode supporting layer forming film with the upper electrode supporting layer forming mask;
- forming an insulating layer on the semiconductor substrate where the upper electrode supporting layer has been formed in the presence of the upper electrode layer forming mask;
- exposing an upper surface of the upper electrode supporting layer forming mask by performing a planarization on the insulating layer;
- removing the upper electrode supporting layer forming mask that has been exposed so as to leave the insulating layer;
- depositing an upper electrode layer forming film on the insulating layer where the upper electrode layer forming mask has been removed;
- and
- forming the upper electrode layer extending in the second direction on the insulating layer including the region where the ferroelectric capacitor is formed by processing the upper electrode layer forming film.
A method for manufacturing a semiconductor device that includes a ferroelectric capacitor provided at an intersection of a lower electrode layer extending in a first direction and an upper electrode layer extending in a second direction, the method comprising:
- depositing a lower electrode layer forming film on a semiconductor substrate;
- depositing a lower electrode layer forming mask on the lower electrode layer forming film;
- forming the lower electrode layer extending in the first direction by processing the lower electrode layer forming film with the lower electrode layer forming mask;
- forming a first insulating layer on the semiconductor substrate where the lower electrode layer has been formed in the presence of the lower electrode layer forming mask;
- exposing an upper surface of the lower electrode layer forming mask by performing a planarization on the first insulating layer;
- removing the lower electrode layer forming mask that has been exposed so as to leave the first insulating layer;
- depositing a ferroelectric layer forming film and an upper electrode supporting layer forming film in this order on the first insulating layer where the lower electrode layer forming mask has been removed;
- depositing an upper electrode supporting layer forming mask on the upper electrode supporting layer forming film;
- forming an upper electrode supporting layer above the lower electrode layer that is at least to be a region where the ferroelectric capacitor is formed by processing the upper electrode supporting layer forming film with the upper electrode supporting layer forming mask;
- forming a second insulating layer on the semiconductor substrate where the upper electrode supporting layer has been formed in the presence of the upper electrode layer forming mask;
- exposing an upper surface of the upper electrode supporting layer forming mask by performing a planarization on the second insulating layer;
- removing the upper electrode supporting layer forming mask that has been exposed so as to leave the second insulating layer;
- forming an upper electrode layer forming film on the second insulating layer where the upper electrode layer forming mask has been removed;
- forming the upper electrode layer extending in the second direction on the second insulating layer including the region where the ferroelectric capacitor is formed by processing the upper electrode layer forming film.
Dependencies are inferred from the claim text.