Method for fabricating trench isolation

A method for forming a trench isolation, comprising:

• providing a semiconductor substrate, wherein a pad layer, a mask layer, and a patterned photoresist layer with an opening are sequentially formed thereon;
• sequentially etching the mask layer, the pad layer, and the semiconductor substrate to form a trench using the patterned photoresist layer as a mask;
• removing the patterned photoresist layer;
• conformably forming an LPCVD oxide layer to cover the semiconductor substrate and the trench, wherein the trench is filled with the LPCVD oxide layer;
• anisotropically etching the LPCVD oxide layer to lower its surface below a top surface of the semiconductor substrate by at least 300 Å;
• forming an insulating layer to cover the semiconductor substrate and the LPCVD oxide layer in the trench, wherein the trench is filled with the insulating layer;
• planarizing the insulating layer to expose the mask layer;
• and
• removing the mask layer.

A method for forming a trench isolation, comprising:

• providing a semiconductor substrate with a trench, wherein the semiconductor substrate has a mask layer;
• forming a LPCVD oxide layer to cover the semiconductor substrate and the trench;
• anisotropically etching the LPCVD oxide layer to form a spacer on a sidewall of the trench;
• forming an insulating layer to cover the semiconductor substrate and the LPCVD oxide layer in the trench;
• and
• planarizing the insulating layer to expose the mask layer.

A method for forming a trench isolation, comprising:

• providing a semiconductor substrate, wherein a pad layer, a mask layer, and a patterned photoresist layer with an opening are sequentially formed thereon;
• sequentially etching the mask layer, the pad layer, and the semiconductor substrate to form a trench using the patterned photoresist layer as a mask;
• removing the patterned photoresist layer;
• conformably forming an LPCVD oxide layer to cover the semiconductor substrate and the trench;
• anisotropically etching the LPCVD oxide layer to form a spacer on a sidewall of the trench;
• forming an insulating layer to cover the semiconductor substrate and LPCVD oxide layer in the trench;
• planarizing the insulating layer to expose the mask layer;
• and
• removing the mask layer.

A method for forming a trench isolation, comprising:

• providing a semiconductor substrate, wherein a pad layer, a mask layer, and a patterned photoresist layer with a first opening and a second opening are sequentially formed thereon;
• sequentially etching the mask layer, the pad layer, and the semiconductor substrate to form a first trench and a second trench using the patterned photoresist layer as a mask, wherein the aspect ratio of the first trench is greater than 6;
• removing the patterned photoresist layer;
• conformably forming an LPCVD oxide layer to cover the semiconductor substrate, the first trench, and the second trench, wherein the first trench is filled with the LPCVD oxide layer;
• anisotropical etching the LPCVD oxide layer to lower its surface below a top surface of the semiconductor substrate by at least 300 Å;
• forming an insulating layer to cover the semiconductor substrate, the LPCVD oxide layer in the first trench and the LPCVD oxide layer in the second trench,
• planarizing the insulating layer to expose the mask layer;
• and
• removing the mask layer.

A method for forming a trench isolation, comprising:

• providing a semiconductor substrate, wherein a pad layer, a mask layer, and a patterned photoresist layer with a first opening and a second opening are sequentially formed thereon;
• sequentially etching the mask layer, the pad layer, and the semiconductor substrate to form a first trench and a second trench using the patterned photoresist layer as a mask, wherein the aspect ratio of the first trench is greater than 6;
• removing the patterned photoresist layer;
• conformably forming an LPCVD oxide layer to cover the semiconductor substrate;
• anisotropically etching the LPCVD oxide layer to form a spacer on a sidewall of the first trench;
• forming an insulating layer to cover the semiconductor substrate, the LPCVD oxide layer in the first trench and the LPCVD oxide layer in the second trench;
• planarizing the insulating layer to expose the mask layer;
• and
• removing the mask layer.