Back to results
US 6,958,269 B2Granted
Memory device with reduced cell size
AssigneeTexas Instruments Incorporated
InventorsJosef Czeslaw Mitros, Imran Khan, Lily Springer
Life of this patent
Estimating the term…
Abstract
A method for manufacturing a memory device includes forming an oxide layer adjacent a substrate. A floating gate layer is formed and disposed outwardly from the oxide layer. A dielectric layer is formed, such that it is disposed outwardly from the floating gate layer. Then, a conductive material layer is formed and disposed outwardly from the dielectric layer, wherein the conductive material layer forms a control gate that is substantially isolated from the floating gate layer by the dielectric layer.
Claims18
A method for manufacturing a memory device, comprising:
- forming an oxide layer adjacent a substrate;
- forming a floating gate disposed outwardly from the oxide layer;
- forming a dielectric layer disposed outwardly from the floating gate, the gate dielectric layer having no ferroelectric material;
- and
- forming an area of conductive metal material disposed outwardly from the dielectric layer, the area of conductive metal material forming a control gate that is substantially isolated from the floating gate by the dielectric layer, wherein the control gate is smaller than the floating gate, the control gate is operable to program the memory device while operating in a first mode, and the control gate is operable to erase the memory device while operating in a second mode.
2 more elements
A memory device, comprising:
- an oxide layer adjacent a substrate;
- a floating gate disposed outwardly from the oxide layer;
- a dielectric layer disposed outwardly from the floating gate, the gate dielectric layer having no ferroelectric material;
- and
- conductive metal material disposed outwardly from the dielectric layer, the conductive metal material forming a control gate that is substantially isolated from the floating gate by the dielectric layer, wherein the control gate is smaller than the floating gate, the control gate is operable to program the memory device while operating in a first mode, and the control gate is operable to erase the memory device while operating in a second mode.
2 more elements
Dependencies are inferred from the claim text.