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US 6,911,857 B1Granted
Current controlled delay circuit
AssigneeCypress Semiconductor Corporation
InventorJonathon C. Stiff
Life of this patent
Estimating the term…
Abstract
A current controlled delay circuit is disclosed. Two currents of constant sum are generated to control the delay of the circuit. The circuit includes a differential pair to switch one of the two currents from one leg of the circuit to another leg of the circuit. The circuit includes a cross-coupled pair to switch the other of the two currents from one leg of the circuit to another leg of the circuit. The circuit may include a fixed or variable load.
Claims15
A circuit comprising:
- a first current source to generate a first current and a second current source to generate a second current, wherein a sum of the first current and the second current is constant;
- a differential pair coupled to the first current source, comprising:
- a first pair of transistors;
- a differential input having a differential input voltage comprising a first input voltage and a second input voltage;
- and
- a differential output having a differential output voltage comprising a first output voltage at a first leg of the circuit and a second output voltage at a second leg of the circuit, wherein
- the differential pair is configured to switch the first current from the second leg of the circuit to the first leg of the circuit in response to a transition of the differential input voltage;
- and
- a cross-coupled pair, comprising a second pair of transistors coupled to the differential output, the second current source, the first leg of the circuit and the second leg of the circuit, to switch the second current from the second leg of the circuit to the first leg of the circuit in response to a transition of the differential output voltage, wherein a time delay between the transition of the differential input and the transition of the differential output is a function of the ratio of the first current to the second current.
6 more elements
A method in a circuit, comprising:
- generating a first current in a differential pair from a first current source and a second current in a cross-coupled pair from a second current source, wherein a sum of the first current and the second current is constant, and wherein the differential pair and the cross-coupled pair have a first output in common and a second output in common, the first output and the second output comprising a differential output of the differential pair;
- summing the first current and the second current at the second output;
- and
- varying a ratio of the first current to the second current to control a time delay between a differential input of the differential pair and the differential output of the differential pair.
1 more element
A ring oscillator, comprising:
- a plurality of current controlled delay cells, each cell comprising:
- a first current source to generate a first current and a second current source to generate a second current, wherein a sum of the first current and the second current is constant;
- a differential pair coupled to the first current source, comprising:
- a first pair of transistors;
- a differential input, comprising a differential input voltage;
- and
- a differential output, comprising a differential output voltage at a second leg of the circuit, wherein
- the differential pair is configured to switch the first current from the second leg of the circuit to the first leg of the circuit in response to a transition of the differential input voltage;
- and
- a cross-coupled pair, comprising a second pair of transistors coupled to the differential output, the second current source, the first leg of the circuit and the second leg of the circuit, to switch the second current from the second leg of the circuit to the first leg of the circuit in response to a transition of the differential output voltage, wherein a time delay between the transition of the differential input and the transition of the differential output is a function of the sum of the first current and the second current, wherein
- the differential output of each cell is coupled to the differential input of one other cell, wherein the differential output of a last cell is coupled to the differential input of a first cell, and wherein a frequency of oscillation of the plurality of cells is inversely proportional to the time delay.
8 more elements
Dependencies are inferred from the claim text.