Non-volatile memory device and method for forming

A method for forming a semiconductor device, comprising the steps of:

• providing a semiconductor substrate;
• forming a first highly doped layer having a first conductivity type into the semiconductor substrate a first distance below a surface of the semiconductor substrate;
• forming a first insulating layer over the semiconductor substrate;
• forming a charge storage layer over the first insulating layer;
• forming a second insulating layer over the charge storage layer;
• forming a source having a second conductivity type into a first predetermined region of the semiconductor substrate;
• forming a drain having the second conductivity type into a second predetermined region of the semiconductor substrate, wherein the first highly doped layer does not extend below a depth of the source and the drain;
• and
• forming a second highly doped layer having the first conductivity type in only a drain side of the first insulating layer and extending through the drain and under the first insulating layer a second distance from an edge of the first insulating layer, wherein the second highly doped region increases a dopant gradient within the second distance;
• wherein a channel region is formed between the source and the drain below the first insulating layer, and wherein the semiconductor device is a non-volatile memory cell and during an access to the non-volatile memory cell a depletion region forms in the channel region at an edge of the channel region to mask the increased dopant gradient within the second distance.

A semiconductor device, comprising:

• a semiconductor substrate;
• a highly doped layer having a first conductivity type formed in the semiconductor substrate a first distance below a surface of the semiconductor substrate;
• an oxide-nitride-oxide structure formed over the semiconductor substrate;
• a gate electrode formed over the oxide-nitride-oxide structure;
• a source having a second conductivity type formed in a first predetermined region of the semiconductor substrate;
• a drain having the second conductivity type formed in a second predetermined region of the semiconductor substrate, wherein the first highly doped layer does not extend below a depth of the source and the drain;
• a channel region between the source and the drain below the first insulating layer;
• and
• an angled halo having the first conductivity type formed in only a drain side of the oxide-nitride-oxide structure and extending through the drain and under the oxide-nitride-oxide structure a second distance from an edge of the oxide-nitride-oxide structure, wherein the angled halo increases a dopant gradient within the second distance,
• wherein the semiconductor device is a non-volatile memory cell and during an access to the non-volatile memory cell a depletion region forms in the channel region at an edge of the channel region to mask the increased dopant gradient within the second distance.

A semiconductor device, comprising:

• a semiconductor substrate;
• a first highly doped p-type layer formed in the semiconductor substrate at a first distance below a surface of the semiconductor substrate, wherein the first highly doped layer is formed using indium as a dopant;
• a first insulating layer formed over the semiconductor substrate;
• a charge storage layer formed over the first insulating layer;
• a second insulating layer formed over the charge storage layer;
• an n-type source formed in a first predetermined region of the semiconductor substrate;
• an n-type drain formed in a second predetermined region of the semiconductor substrate, wherein the first highly doped p-type layer does not extend below a depth of the n-type source and the n-type drain;
• a channel region between the n-type source and the n-type drain below the first insulating layer;
• and
• a second highly doped p-type layer formed in only a drain side of the first insulating layer and extending through the n-type drain and under the first insulating layer a second distance from an edge of the first insulating layer, wherein the second highly doped p-type layer is formed using indium as a dopant.