US 6,856,351 B1 · Device and method for reducing lag and blooming in amorphous silicon sensor arrays

Abstract

A clamping circuit including a clamping diode, a bias line, and a clamp line is incorporated into a pixel circuit of amorphous silicon sensor arrays. The clamp diode in each pixel prevents the voltage across the photodiode from dropping below a specific threshold. By keeping the photodiode under reverse bias even under conditions that may otherwise saturate the pixel, image lag is reduced. In full fill factor amorphous silicon sensor arrays, a clamping circuit includes a clamp TFT, a bias plane, a clamp line, and a drain line. The clamp TFT reduces lag and blooming by draining off excess current developed under overexposure conditions. A method to globally reset a sensor array and a method to test and repair a TFT matrix in full fill factor sensor arrays without damaging the overlying collection electrode and sensor layer are also provided.

Claims7

Dependent claims

An image array having a plurality of pixels disposed in rows and columns, wherein each pixel includes a photodiode, a thin film transistor (TFT), and a clamping diode, the image array further comprising:

a plurality of data lines, each of the plurality of data lines coupled to each of a source or a drain of the thin film transistor of a row or a column of pixels;
a plurality of gate lines, each of the plurality of gate lines coupled to each of a gate of the thin film transistor of a column or a row of pixels;
a plurality of bias lines carrying a bias voltage, each of the plurality of bias lines coupled to each of an anode of the photodiode of the pixels in a row or a column of pixels;
and
a plurality of clamp lines electrically interconnecting the clamping diodes in individual ones of the rows or columns of the array, wherein the clamp lines carry a clamping voltage,
wherein the clamping diode in each pixel is electrically connected between a storage node of the photodiode and the clamp line.

3 more elements

Dependencies are inferred from the claim text.

Device and method for reducing lag and blooming in amorphous silicon sensor arrays

Life of this patent

Device and method for reducing lag and blooming in amorphous silicon sensor arrays

Life of this patent

Abstract

Claims7