Method for forming a dual damascene wiring pattern in a semiconductor device

A method of forming a dual damascene wiring pattern, comprising the steps of:

• forming an etch stop film and an interlayer dielectric film comprising an SiOC:H group material on a substrate having an electrical connection layer formed thereon;
• forming an anti-reflection layer on the interlayer dielectric film;
• forming a primary opening by etching the anti-reflection layer and the interlayer dielectric film to expose a surface of the etch stop film;
• forming a sacrificial film comprising a low dielectric constant material in the primary opening and on the anti-reflection layer;
• forming a capping thin film on a portion of the sacrificial film that is over the anti-reflection layer, and forming a trench photoresist pattern having a width larger than that of the primary opening on the capping thin film;
• sequentially etching the capping thin film, the sacrificial film, the anti-reflection layer and the interlayer dielectric film using the trench photoresist pattern as an etch mask so as to form a secondary opening of a trench shape, and removing the trench photoresist pattern, said secondary opening extending from an upper portion of the primary opening;
• and
• removing the remaining capping thin film and the remaining sacrificial film, removing the exposed etch stop film and anti-reflection layer, and filling the primary and secondary openings with metal so as to be electrically coupled with the electrical connection layer.

A method of forming a dual damascene wiring pattern, comprising the steps of:

• forming an etch stop film and an interlayer dielectric film comprising an SiOC:H group material on a substrate having an electrical connection layer formed thereon;
• forming an anti-reflection layer on the interlayer dielectric film;
• forming a primary opening by etching the anti-reflection layer and the interlayer dielectric film to expose a surface of the etch stop film;
• forming a sacrificial film comprising a low dielectric constant material in the primary opening and on the anti-reflection layer;
• forming an anti-reflection coating film on a portion of the sacrificial film that is over the anti-reflection layer, and forming a trench photoresist pattern having a width larger than that of the primary opening on the anti-reflection coating film;
• sequentially etching the anti-reflection coating film, the sacrificial film, the anti-reflection layer and the interlayer dielectric film using the trench photoresist pattern as an etch mask so as to form a secondary opening of a trench shape, and removing the trench photoresist pattern, said secondary opening extending from an upper portion of the primary opening;
• and
• removing the remaining anti-reflection coating film and the remaining sacrificial film, removing the exposed etch stop film and anti-reflection layer, and filling the primary and secondary openings with metal so as to be electrically coupled with the electrical connection layer.