Semiconductor memory device
AssigneeMatsushita Electric Industrial Co., Ltd.
InventorsMasashi Agata, Kazunari Takahashi, Masanori Shirahama, Naoki Kuroda, Hiroyuki Sadakata, Ryuji Nishihara
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Abstract
A semiconductor memory device has a plurality of memory cells each having a first transistor, a second transistor having a source or drain connected to one portion of the source or drain of the first transistor, and a third transistor having a source or drain connected to the other portion of the source or drain of the first transistor. The first transistor accumulates, in the channel thereof, charges transferred from the second and third transistors.
Claims17
A semiconductor memory device comprising:
- a plurality of memory cells each having a first transistor, a second transistor having a source or drain connected to a portion of a source or drain of the first transistor, and a third transistor having a source or drain connected to another portion of the source or drain of the first transistor,
- the first transistor accumulating, in a channel thereof, a charge transferred from the second and third transistors.
A semiconductor memory device comprising:
- a plurality of memory cells each having a first transistor, a second transistor having a source or drain connected to a gate of the first transistor, and a third transistor having a source or drain connected to the gate of the first transistor,
- each of the second and third transistors transferring a charge to the gate of the first transistor.
Dependencies are inferred from the claim text.