Electrostatic discharge protection circuit
AssigneeUnited Microelectronics Corp.
InventorsShiao-Shien Chen, Tien-Hao Tang
Life of this patent
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Abstract
An electrostatic discharge (ESD) protection circuit formed on a P-type substrate. The ESD protection circuit is disposed between a bonding pad and an internal circuit formed on a P-type substrate, and has a P-type metal-oxide semiconductor (PMOS) and an N-type metal-oxide semiconductor (NMOS). The PMOS has a first doped regionformed below a P+ guard ring of the PMOS and a well pick-up of the PMOS. The NMOS has second doped regionformed below a N+ guard ring of the NMOS and a well pick-up of the NMOS. An equivalent zener diode is formed on the P-type substrate. A breakdown of the equivalent zener diode restricts the PMOS or the NMOS from producing a snapback breakdown.
Claims20
An electrostatic discharge (ESD) protection circuit formed on a P-type substrate and disposed between a bonding pad and an internal circuit on the P-type substrate for protecting the internal circuit from electrostatic discharge, the ESD protection circuit being electrically connected to the internal circuit, a first power supply terminal, a second power supply terminal, and the bonding pad, the ESD protection circuit comprising:
- a P-type metal-oxide semiconductor (PMOS) formed on the P-type substrate, the PMOS comprising:
- a P+ guard ring formed on the P-type substrate and electrically connecting to the second power supply terminal;
- a first N+ diffusion region formed on the P-type substrate and surrounded by the P+ guard ring without contact with the P+ guard ring, the N+ diffusion region electrically connecting to the first power supply terminal;
- a first N-well formed on the P-type substrate and contacting with the first N+ diffusion region;
- and
- a first doped region formed below the P+ guard ring and the first N+ diffusion region, and contacting with the P+ guard ring and the first N+ diffusion region to form a first equivalent Zener diode;
- and
- an N-type metal-oxide semiconductor (NMOS) formed on the P-type substrate, the NMOS comprising:
- an N+ guard ring formed on the P-type substrate and electrically connected to the first power supply terminal;
- a first P+ diffusion region formed on the P-type substrate and surrounded by the N+ guard ring without contact with the N+ guard ring, the P+ diffusion region electrically connecting to the second power supply terminal;
- and
- a second N-well formed below the N+ guard ring and contacting with the N+ guard ring.
An electrostatic discharge (ESD) protection circuit formed on a P-type substrate and disposed between a bonding pad and an internal circuit on the P-type substrate for protecting the internal circuit from electrostatic discharge, the ESD protection circuit being electrically connected to the internal circuit, a first power supply terminal, a second power supply terminal, and the bonding pad, the ESD protection circuit comprising:
- a P-type metal-oxide semiconductor (PMOS) formed on the P-type substrate, the PMOS comprising:
- a P+ guard ring formed on the P-type substrate and electrically connecting to the second power supply terminal;
- a first N+ diffusion region formed on the P-type substrate and surrounded by the P+ guard ring without contact with the P+ guard ring, the N+ diffusion region electrically connecting to the first power supply terminal;
- and
- a first N-well formed on the P-type substrate and contacting with the first N+ diffusion region;
- and
- an N-type metal-oxide semiconductor (NMOS) formed on the P-type substrate, the NMOS comprising:
- an N+ guard ring formed on the P-type substrate and electrically connected to the first power supply terminal;
- a first P+ diffusion region formed on the P-type substrate and surrounded by the N+ guard ring without contact with the N+ guard ring, the P+ diffusion region electrically connecting to the second power supply terminal;
- a second N-well formed below the N+ guard ring and contacting with the N+ guard ring;
- and
- a second doped region formed below the N+ guard ring and the first P+ diffusion region, and contacting with the N+ guard ring and the first P+ diffusion region to form a second equivalent Zener diode.
Dependencies are inferred from the claim text.