Gas insulated gate field effect transistor

An integrated circuit comprising:

• (a) a plurality of interconnected gas insulated gate field effect transistors on a semiconductor substrate having input/output contacts at selected points along the interconnections, each gas insulated gate field effect transistor comprising:
• (i) a doped source region and a doped drain region formed on the substrate, the regions having a channel between them;
• (ii) an electrically conducting gate formed on the substrate;
• (iii) a gate insulator consisting of a gaseous gate insulating trench positioned such that the gate is on one side of the trench and the doped source and the doped drain regions are on the other side of the trench, the gaseous gate insulating trench being the sole gate insulator of the gas insulated gate field effect transistor;
• and
• (iv) a gate terminal, a source terminal and a drain terminal electrically connected to the gate, the doped source region and the doped drain region, respectively, for providing electrical connection points;
• (b) a package within which the substrate is placed;
• (c) external integrated circuit leads passing from within the package to outside the package, each lead being wirebonded at its end within the package to a selected input/output contact.