Method for operating a stacked gate field effect transistor (FET) device
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorChia-Ta Hsieh
Life of this patent
Estimating the term…
Loading patent…
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorChia-Ta Hsieh
Estimating the term…
Within a stacked gate field effect transistor (FET) device, as well as a method for fabrication thereof and a method for operation thereof, there is provided a stacked gate field effect transistor (FET) device comprising a layered stack of a tunneling dielectric layer, a floating gate electrode, an inter-gate electrode dielectric layer and a control gate electrode formed upon a semiconductor substrate. To enhance performance of the stacked gate field effect transistor (FET) device, at least one of: (1) the floating gate electrode is formed with a pointed edge tip at its outer sidewall; (2) the floating gate electrode in formed with a pointed linear recess centered within its linewidth; and (3) a pair of source/drain regions is formed asymmetrically penetrating beneath the pair of opposite edges of the floating gate electrode and not laterally spaced from a floating gate electrode sidewall.
A method for operating a stacked gate field effect transistor device comprising:
Dependencies are inferred from the claim text.