Semiconductor memory with trench capacitor and method of manufacturing the same

A semiconductor memory device comprising:

• a first semiconductor layer;
• a buried insulating layer formed on said first semiconductor layer;
• a second semiconductor layer formed on said buried insulating layer;
• a trench formed to reach said first semiconductor layer through said second semiconductor layer and said buried insulating layer, said trench comprising a depressed portion at which a side surface of said buried insulating layer is depressed from a side surface of said second semiconductor layer, and said trench defining a first opening width at said second semiconductor layer;
• a first capacitor electrode formed in said first semiconductor layer along a side surface and a bottom surface of said trench;
• a capacitor insulating film formed in said trench to cover said first capacitor electrode;
• a second capacitor electrode formed in said trench in said first semiconductor layer to oppose said first capacitor electrode through said capacitor insulating film;
• an insulating film formed on a side surface of the depressed portion, said insulating film defining a second opening width and a third opening width, the second opening width serving as a width at said buried insulating layer, the second opening width being not more than the first opening width, and the third opening width serving as a width at a boundary portion between said buried insulating layer and first semiconductor layer, the trench having a fourth opening width at a boundary between the buried insulating layer and the second semiconductor layer, the fourth opening width being greater than the second opening width;
• and
• a connection portion which is formed in said trench in said buried insulating layer and said second semiconductor layer and electrically connected to said second capacitor electrode.