Heterostructure field effect transistor
AssigneeTriQuint Semiconductor, Inc.
InventorsHua Quen Tserng, Edward A. Beam, III, Ming-Yih Kao
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Abstract
A high electron mobility transistor is constructed with a substrate, a lattice-matching buffer layer formed on the substrate, and a heavily doped p-type barrier layer formed on the buffer layer. A spacer layer is formed on the barrier layer, and a channel layer is formed on the spacer layer. The channel layer may be of uniform composition, or may be made from two or more sublayers. A Schottky layer is formed over the channel layer, and source and drain contacts are formed on the Schottky layer. The substrate may be gallium arsenide, indium phosphide, or other suitable material, and the various semiconductor layers formed over the substrate contain indium. The transistor's transition frequency of the transistor is above 200 GHz.
Claims30
A transistor comprising:
- a substrate;
- a buffer layer formed directly on the substrate, wherein the buffer layer grades a lattice constant from the substrate to a lattice constant at an overlying layer;
- a barrier layer formed over the buffer layer, wherein the barrier layer comprises a p-type dopant concentration above 1*1017 atoms/cm3;
- a spacer layer formed directly on the barrier layer;
- a channel layer formed directly on the spacer layer;
- and
- a Schottky layer formed over the channel layer;
- wherein the buffer, barrier, spacer, channel, and Schottky layers each comprise indium.
A transistor comprising:
- a substrate;
- a buffer layer formed directly on the substrate, wherein the buffer layer is lattice-matched to the substrate and grades a lattice constant from the substrate to a lattice constant at an overlying layer;
- a barrier layer formed over the buffer layer, wherein the barrier layer comprises a p-type dopant concentration above 1*1017 atoms/cm3;
- a spacer layer formed directly on the barrier layer;
- a channel layer formed directly on the spacer layer;
- and
- a Schottky layer formed over the channel layer;
- wherein the buffer, barrier, spacer, channel, and Schottky layers each comprise indium.
A method of forming a transistor, comprising the acts of:
- providing a substrate;
- forming a buffer layer directly on the substrate, wherein the buffer grades a lattice constant from the substrate to a lattice constant at an overlying layer;
- forming a barrier layer over the buffer layer, and doping the barrier layer to a p-type dopant concentration above 1*1017 atoms/cm3;
- forming a spacer layer directly on the barrier layer;
- forming a channel layer directly on the spacer layer;
- and
- forming a Schottky layer over the channel layer;
- wherein the buffer, barrier, spacer, channel, and Schottky layers each comprise indium.
A method of forming a transistor, comprising the acts of:
- providing a substrate;
- forming a buffer layer directly on the substrate, wherein the buffer is lattice matched to the substrate and grades a lattice constant from the substrate to a lattice constant at an overlying layer;
- forming a barrier layer over the buffer layer, and doping the barrier layer to a p-type dopant concentration above 1*1017 atoms/cm3;
- forming a spacer layer directly on the barrier layer;
- forming a channel layer directly on the spacer layer;
- and
- forming a Schottky layer over the channel layer;
- wherein the buffer, barrier, spacer, channel, and Schottky layers each comprise indium.
An electronic switch comprising a high electron mobility transistor, wherein the high electron mobility transistor comprises:
- a substrate;
- a barrier layer formed over the substrate, wherein the barrier layer comprises a p-type dopant concentration above 1*1017 atoms/cm3;
- a spacer layer formed directly on the barrier layer;
- and
- a channel layer formed directly on the spacer layer;
- wherein the transistor is coupled to receive an input signal and to output an output signal, wherein the input signal comprises a frequency above 260 gigahertz, and wherein the output signal comprises a frequency above 260 gigaHertz.
An electronic switch comprising a high electron mobility transistor, wherein the high electron mobility transistor comprises:
- a substrate;
- a barrier layer formed over the substrate, wherein the barrier layer comprises a p-type dopant concentration above 1*1017 atoms/cm3;
- a spacer layer formed directly on the barrier layer;
- and
- a channel layer formed directly on the spacer layer;
- wherein the transistor is coupled to receive an input signal and to output an output signal, wherein the input signal comprises a data rate above 40 gigabits per second, and wherein the output signal comprises a data rate above 40 gigabits per second.
Dependencies are inferred from the claim text.