Gate structure forming method of field effect transistor

A fabrication method for a field effect transistor, the method comprising:

• forming a pad layer on a surface of a substrate;
• forming a patterned first photoresist layer on the pad layer, wherein the patterned first photoresist layer comprises a first opening that exposes the pad layer;
• forming a cross-linked surface layer on a surface of the first photoresist layer;
• performing a rounding process for rounding a profile of the first photoresist layer;
• removing the pad layer not covered by the first photoresist layer to expose the surface of the substrate;
• forming a patterned second photoresist layer on the first photoresist layer, wherein the second photoresist layer comprises a second opening that exposes the substrate surface being exposed by the first photoresist layer and a part of the first photoresist layer;
• performing a metal deposition step to form a metal layer on the second photoresist layer, the first photoresist layer and the surface of the substrate, wherein a part of the metal layer formed on the second photoresist layer is separated from a part of the metal layer formed on the first photoresist layer and the surface of the substrate;
• removing the first photoresist layer, the second photoresist layer, and concurrently stripping the part of metal layer on the second photoresist layer, leaving the part of the metal layer formed on the surface of the substrate as a gate;
• patterning the pad layer to expose the surface of the substrate;
• and
• forming a source/drain region on the surface of the substrate.