Method for measurement of electromigration in semiconductor integrated circuits

Abstract

Electromigration testing is accelerated in the batch fabrication of semiconductor integrated circuits by forming test structures during the metal deposition phase of the batch fabrication process. Test metal lines can be formed on steps etched in a silicon oxide insulating layer with the vertical walls of the steps being greater than twice the thickness of the deposited metal whereby metal is not deposited on the side walls. Alternatively, test lines in the deposit metal layer can be formed by laser ablation or by ultrasound erosion. In another embodiment, electromigration tests are performed directly on the deposit metal layer through use of spaced elongated electrical contacts placed on the deposited metal layer surface. The elongated contacts can be wires of known diameter and length, or the elongated contacts can comprise a plurality of point contacts.

Dependencies are inferred from the claim text.