Electrostatic discharge protection structures for high speed technologies with mixed and ultra-low voltage supplies

An electrostatic discharge (ESD) protection circuit in a semiconductor integrated circuit (IC) having protected circuitry, the ESD protection circuit comprising:

• a pad, adapted for connection to a protected circuit node of the IC;
• a silicon controlled rectifier (SCR) having a P-doped anode coupled to the pad, and an N-doped cathode coupled to ground, said SCR further comprising a first PN junction defined by said anode formed in a first N-well, a second PN junction between said first N-well and a first P-well, and a third PN junction defined by said P-well and said cathode to collectively form a PNPN sequence, said first, second, and third PN junctions respectively forming first, second, and third PN diodes;
• and
• at least one series PN junction diode coupled in a forward conduction direction from said first PN diode of the SCR to ground, wherein said first PN diode defines a first diode of a diode chain coupled in the forward conduction direction from the pad to ground.